參數(shù)資料
型號(hào): MAX2112
廠商: Maxim Integrated Products, Inc.
英文描述: Complete, Direct-Conversion Tuner for DVB-S2 Applications
中文描述: 完備的直接變頻調(diào)諧器,用于DVB-S2系統(tǒng)
文件頁(yè)數(shù): 9/19頁(yè)
文件大?。?/td> 313K
代理商: MAX2112
M
Complete, Direct-Conversion
Tuner for DVB-S2 Applications
_______________________________________________________________________________________
9
Detailed Description
Register Description
The MAX2112 includes 12 user-programmable regis-
ters and 2 read-only registers. See Table 1 for register
configurations. The register configuration of Table 1
shows each bit name and the bit usage information for all
registers. Note that all registers must be written after and
no earlier than 100μs after the device is powered up.
Pin Description (continued)
PIN
26
27
28
NAME
SDA
SCL
ADDR
EP
DESCRIPTION
2-Wire Serial-Data Interface. Requires a 2.7k
Ω
pullup resistor to V
CC
.
2-Wire Serial-Clock Interface. Requires a 2.7k
Ω
pullup resistor to V
CC
.
Address. Must be connected to either ground (logic 0) or supply (logic 1).
Exposed Paddle. Solder evenly to the board’s ground plane for proper operation.
Table 1. Register Configuration
MSB LSB
DATA BYTE
D[7]
D[6]
D[5]
D[4]
REG
NUMBER
R EG ST ER
N A M E
R EA D
WR T E
R EG
A D D R ESS
D[3]
D[2]
D[1]
D[0]
1
N-Divider
MSB
Write
0x00
FRAC
1
N[14]
N[13]
N[12]
N[11]
N[10]
N[9]
N[8]
2
N-Divider
LSB
Write
0x01
N[7]
N[6]
N[5]
N[4]
N[3]
N[2]
N[1]
N[0]
3
Charge
Pump
Write
0x02
CPMP[1]
0
CPMP[0]
0
CPLIN[1]
0
CPLIN[0]
0
F[19]
F[18]
F[17]
F[16]
4
F-Divider
MSB
Write
0x03
F[15]
F[14]
F[13]
F[12]
F[11]
F[10]
F[9]
F[8]
5
F-Divider
LSB
Write
0x04
F[7]
F[6]
F[5]
F[4]
F[3]
F[2]
F[1]
F[0]
6
XTAL
Divider
R-Divider
Write
0x05
XD[2]
XD[1]
XD[0]
R[4]
R[3]
R[2]
R[1]
R[0]
7
PLL
Write
0x06
D24
CPS
0
ICP
1
X
X
X
X
X
8
9
10
11
VCO
LPF
Control
Shutdown
Write
Write
Write
Write
0x07
0x08
0x09
0x0A
VCO[4]
LP[7]
STBY
X
VCO[3]
LP[6]
X
PLL
VCO[2]
LP[5]
PWDN
DIV
VCO[1]
LP[4]
X
VCO
VCO[0]
LP[3]
BBG[3]
BB
VAS
LP[2]
BBG[ 2] BBG[ 1] BBG[ 0]
RFMIX RFVG
LD
M U X[ 2]
0
0
ADL
LP[1]
ADE
LP[0]
FE
LD
12
Test
Write
0x0B
CPTST[2]
0
CPTST[1]
0
CPTST[0]
0
X
TURBO
1
LD
M U X[ 1]
M U X[ 0]
0
13
Status
Byte-1
Read
0x0C
POR
VASA
VASE
LD
X
X
X
X
14
Status
Byte-2
Read
0x0D
V C OS BR[4] V C OS BR[3] V C OS BR[2] V C OS BR[1] V C OS BR[0] AD C[ 2] AD C[ 1] AD C[ 0]
X = Don’t care.
0 = Set to 0 for factory-tested operation.
1 = Set to 1 for factory-tested operation.
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