- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383343 > MAX19706 (Maxim Integrated Products, Inc.) 10-Bit, 45Msps, Ultra-Low-Power Analog Front-End PDF資料下載
參數(shù)資料
| 型號： | MAX19706 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | 10-Bit, 45Msps, Ultra-Low-Power Analog Front-End |
| 中文描述： | 10位、22Msps、超低功耗模擬前端 |
| 文件頁數(shù)： | 32/37頁 |
| 文件大?。?/td> | 561K |
| 代理商： | MAX19706 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁當(dāng)前第32頁第33頁第34頁第35頁第36頁第37頁
M
10-Bit, 45Msps, Ultra-Low-Power
Analog Front-End
32
______________________________________________________________________________________
0
2
1
4
3
7
6
5
000
010
DIGITAL INPUT CODE
001
011
100
101
110
AT STEP
011 (0.5 LSB)
AT STEP
001 (0.25 LSB)
111
A
Figure 13a. Integral Nonlinearity
0
2
1
4
3
6
5
000
010
DIGITAL INPUT CODE
001
011
100
101
DIFFERENTIAL LINEARITY
ERROR (-0.25 LSB)
DIFFERENTIAL
LINEARITY ERROR (+0.25 LSB)
1 LSB
1 LSB
A
Figure 13b. Differential Nonlinearity
Grounding, Bypassing, and
Board Layout
The MAX19707 requires high-speed board layout
design techniques. Refer to the MAX19707 EV kit data
sheet for a board layout reference. Place all bypass
capacitors as close to the device as possible, prefer-
ably on the same side of the board as the device, using
surface-mount devices for minimum inductance.
Bypass V
DD
to GND with a 0.1μF ceramic capacitor in
parallel with a 2.2μF capacitor. Bypass OV
DD
to OGND
with a 0.1μF ceramic capacitor in parallel with a 2.2μF
capacitor. Bypass REFP, REFN, and COM each to
GND with a 0.33μF ceramic capacitor. Bypass REFIN
to GND with a 0.1μF capacitor.
Multilayer boards with separated ground and power
planes yield the highest level of signal integrity. Use a
split ground plane arranged to match the physical loca-
tion of the analog ground (GND) and the digital output-
driver ground (OGND) on the device package.
Connect the MAX19707 exposed backside paddle to
GND plane. Join the two ground planes at a single
point so the noisy digital ground currents do not inter-
fere with the analog ground plane. The ideal location
for this connection can be determined experimentally
at a point along the gap between the two ground
planes. Make this connection with a low-value, surface-
mount resistor (1
to 5
), a ferrite bead, or a direct
short. Alternatively, all ground pins could share the
same ground plane, if the ground plane is sufficiently
isolated from any noisy digital system’s ground plane
(e.g., downstream output buffer or DSP ground plane).
Route high-speed digital signal traces away from sensi-
tive analog traces. Make sure to isolate the analog
input lines to each respective converter to minimize
channel-to-channel crosstalk. Keep all signal lines
short and free of 90° turns.
Dynamic Parameter Definitions
ADC and DAC Static Parameter Definitions
Integral Nonlinearity (INL)
Integral nonlinearity is the deviation of the values on an
actual transfer function from a straight line. This straight
line can be either a best-straight-line fit or a line drawn
between the end points of the transfer function, once
offset and gain errors have been nullified. The static lin-
earity parameters for the device are measured using
the best-straight-line fit (DAC Figure 13a).
Differential Nonlinearity (DNL)
Differential nonlinearity is the difference between an
actual step width and the ideal value of 1 LSB. A DNL
error specification of less than 1 LSB guarantees no
missing codes (ADC) and a monotonic transfer function
(ADC and DAC) (DAC Figure 13b).
ADC Offset Error
Ideally, the midscale transition occurs at 0.5 LSB above
midscale. The offset error is the amount of deviation
between the measured transition point and the ideal
transition point.
DAC Offset Error
Offset error (Figure 13a) is the difference between the
ideal and actual offset point. The offset point is the out-
put value when the digital input is midscale. This error
affects all codes by the same amount and usually can
be compensated by trimming.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX19707 | 10-Bit, 45Msps, Ultra-Low-Power Analog Front-End |
| MAX19707ETM | 10-Bit, 45Msps, Ultra-Low-Power Analog Front-End |
| MAX19708 | 10-Bit, 45Msps, Ultra-Low-Power Analog Front-End |
| MAX1971EEE | Fixed-Point Digital Signal Processor 532-FCBGA |
| MAX1970-MAX1972 | Dual, 180∑ Out-of-Phase, 1.4MHz, 750mA Step- Down Regulator with POR and RSI/PFO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX19706ETM | 功能描述:ADC / DAC多通道 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| MAX19706ETM+ | 功能描述:ADC / DAC多通道 22Msps CODEC/AFE 1.8/2.7-3.3V RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| MAX19706ETM+T | 功能描述:ADC / DAC多通道 22Msps CODEC/AFE 1.8/2.7-3.3V RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| MAX19706ETM-T | 功能描述:ADC / DAC多通道 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| MAX19706EVCMOD2 | 功能描述:ADC / DAC多通道 Evaluation System for the MAX19706 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。