參數(shù)資料
型號(hào): MAX1816
廠商: Maxim Integrated Products, Inc.
元件分類: 數(shù)字信號(hào)處理
英文描述: Replaced by TMS320VC5506 : Digital Signal Processors 144-LQFP
中文描述: 雙路、降壓型控制器及線性穩(wěn)壓控制器,用于筆記本電腦
文件頁(yè)數(shù): 20/49頁(yè)
文件大小: 983K
代理商: MAX1816
M
Dual Step-Down Controllers Plus Linear-
Regulator Controller for Notebook Computers
20
______________________________________________________________________________________
PIN
NAME
FUNCTION
1
ILIM1
BUCK1 Current-Limit Adjustment. The CS1+ - CS1- current-limit threshold defaults to 50mV if ILIM1 is
connected to V
CC
. In adjustable mode, the current-limit threshold voltage is precisely 1/10th of the voltage
at ILIM1. The logic threshold for switchover to the default value is approximately V
CC
- 1V.
Integrator Time Constant Control Input. This pin allows the integrator to be compensated independent of
the voltage-positioning sense feedback path. Connect a 47pF to 1000pF capacitor from this pin to ground
to control the integration time constant.
Positive Voltage-Positioning and Current-Sense Input for BUCK1. The current-limit sense voltage for
CS1+ - CS1- is 1/10th of the voltage at the ILIM1 input. The CS1+ and CS1- inputs are also used for active
voltage positioning, with the voltage-positioning gain set with the GAIN pin. Connecting the GAIN pin to
ground disables voltage positioning. Positive and negative current limits are always active.
Negative Voltage-Positioning and Current-Sense Input for BUCK1. CS1- is also the output sense input for
calculating TON. The current-limit sense voltage for CS1+ - CS1- is 1/10th of the voltage at the ILIM1 input.
The CS1+ and CS1- inputs are also used for active voltage positioning, with the voltage-positioning gain
set with the GAIN pin. Connecting the GAIN pin to ground disables voltage positioning. Positive and
negative current limits are always active.
Output Feedback Remote-Sense Input for BUCK1. Connect FBS directly to the load. FBS internally
connects to an amplifier that fine-tunes the output voltage, compensating for voltage drops from the
regulator output to the load.
Ground Remote-Sense Input for BUCK1. Connect GDS directly to the load. GDS internally connects to an
amplifier that fine-tunes the output voltage, compensating for voltage drops from the regulator ground to
the load ground.
Voltage-Positioning Gain Control. GAIN is a four-level logic input that selects the voltage-positioning gain
(see
CS1+, CS1-
pins). The gain setting does not affect current-limit functions. Connecting GAIN to GND
disables the voltage positioning by setting the gain to zero. Connecting GAIN to REF sets the gain to 1.5.
Leaving GAIN open sets the gain to 2. Connecting GAIN to V
CC
sets the gain to 4.
GND = 0; REF = 1.5; open = 2; V
CC
= 4.
Voltage-Divider Input for Voltage-Positioning Offset Control. OFS0
OFS2 are selected based on the SUS,
PERF, and
DPSLP
signals. For 0V < OFS_ < 0.8V, 0.125 times the voltage at OFS_ is subtracted from the
output. For 1.2V < OFS_ < 2.0V, 0.125 times the difference between REF and OFS_ is added to the output.
Voltages in the range of 0.8V < OFS_ < 1.2V are not permitted (see Table 7).
Voltage-Divider Input for Voltage-Positioning Offset Control. OFS0
OFS2 are selected based on the SUS,
PERF, and
DPSLP
signals. For 0V < OFS_ < 0.8V, 0.125 times the voltage at OFS_ is subtracted from the
output. For 1.2V < OFS_ < 2.0V, 0.125 times the difference between REF and OFS_ is added to the output.
Voltages in the range of 0.8V < OFS_ < 1.2V are not permitted (see Table 7).
Voltage-Divider Input for Voltage-Positioning Offset Control. OFS0
OFS2 are selected based on the SUS,
PERF, and
DPSLP
signals. For 0V < OFS_ < 0.8V, 0.125 times the voltage at OFS_ is subtracted from the
output. For 1.2V < OFS_ < 2.0V, 0.125 times the difference between REF and OFS_ is added to the output.
Voltages in the range of 0.8V < OFS_ < 1.2V are not permitted (see Table 7).
Suspend Mode Control Input. The SUS signal causes the S0 and S1 inputs to take precedence over the
VID code setting and OFS inputs. When SUS is high, the state of the S0 and S1 inputs are decoded to
select the appropriate DAC code and the offset is forced to zero (see the
DAC Inputs and Internal
Multiplexer
section).
Deep Sleep Control Input. This logic control input goes to the offset selection multiplexer that determines
which, if any, offset control inputs are read (OFS0
OFS2). This input is compatible with 1.5V logic (see
Table 7).
VID Code Input. D0 is the least significant bit (LSB).
2
CC
3
CS1+
4
CS1-
5
FBS
6
GDS
7
GAIN
8
OFS0
9
OFS1
10
OFS2
11
SUS
12
DPSLP
13
D0
Pin Description
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX1816ETM 功能描述:DC/DC 開(kāi)關(guān)控制器 RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開(kāi)關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
MAX1816ETM+ 功能描述:DC/DC 開(kāi)關(guān)控制器 RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開(kāi)關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
MAX1816ETM+T 功能描述:DC/DC 開(kāi)關(guān)控制器 NULL RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開(kāi)關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
MAX1816ETM-T 功能描述:DC/DC 開(kāi)關(guān)控制器 NULL RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開(kāi)關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
MAX1816XR31+ 制造商:Maxim Integrated Products 功能描述: