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參數(shù)資料
| 型號： | MAX1718EEI |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Notebook CPU Step-Down Controller for Intel Mobile Voltage Positioning IMVP-II |
| 中文描述： | SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO28 |
| 封裝： | 0.150 INCH, 0.025 INCH PITCH, MO-137AD, QSOP-28 |
| 文件頁數(shù)： | 16/35頁 |
| 文件大小： | 700K |
| 代理商： | MAX1718EEI |
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M
Notebook CPU Step-Down Controller for Intel
Mobile Voltage Positioning (IMVP-II)
16
______________________________________________________________________________________
(Figure 7). The actual peak current is greater than the
current-limit threshold by an amount equal to the induc-
tor ripple current. Therefore, the exact current-limit
characteristic and maximum load capability are a func-
tion of the MOSFET on-resistance, inductor value, and
battery voltage. The reward for this uncertainty is
robust, lossless overcurrent sensing. When combined
with the undervoltage protection circuit, this current-
limit method is effective in almost every circumstance.
There is also a negative current limit that prevents
excessive reverse inductor currents when V
OUT
is sinking
current. The negative current-limit threshold is set to
approximately 120% of the positive current limit, and
therefore tracks the positive current limit when ILIM is
adjusted.
The current-limit threshold is adjusted with an external
resistor-divider at ILIM. The current-limit threshold volt-
age adjustment range is from 50mV to 300mV. In the
adjustable mode, the current-limit threshold voltage is
precisely 1/10th the voltage seen at ILIM. The threshold
defaults to 100mV when ILIM is connected to V
CC
. The
logic threshold for switchover to the 100mV default
value is approximately V
CC
- 1V.
The adjustable current limit accommodates MOSFETs
with a wide range of on-resistance characteristics (see
the
Design Procedure
section). For a high-accuracy
current-limit application, see Figure 16.
Carefully observe the PC board layout guidelines to
ensure that noise and DC errors don
’
t corrupt the current-
sense signals seen by LX and GND. Place the IC close
to the low-side MOSFET with short, direct traces, mak-
ing a Kelvin sense connection to the source and drain
terminals.
MOSFET Gate Drivers (DH, DL)
The DH and DL drivers are optimized for driving mod-
erate-sized high-side and larger low-side power
MOSFETs. This is consistent with the low duty factor
seen in the notebook CPU environment, where a large
V
BATT
- V
OUT
differential exists. An adaptive dead-time
circuit monitors the DL output and prevents the high-
side FET from turning on until DL is fully off. There must
be a low-resistance, low-inductance path from the DL
driver to the MOSFET gate for the adaptive dead-time cir-
cuit to work properly. Otherwise, the sense circuitry in the
MAX1718 will interpret the MOSFET gate as
“
off
”
while
there is actually still charge left on the gate. Use very
short, wide traces measuring 10 to 20 squares (50 to 100
mils wide if the MOSFET is 1 inch from the MAX1718).
The dead time at the other edge (DH turning off) is
determined by a fixed 35ns (typ) internal delay.
The internal pulldown transistor that drives DL low is
robust, with a 0.4
(typ) on-resistance. This helps pre-
vent DL from being pulled up during the fast rise-time
of the inductor node, due to capacitive coupling from
the drain to the gate of the low-side synchronous-rectifi-
er MOSFET. However, for high-current applications, you
might still encounter some combinations of high- and
low-side FETs that will cause excessive gate-drain cou-
pling, which can lead to efficiency-killing, EMI-
producing shoot-through currents. This is often remedied
by adding a resistor in series with BST, which increases
the turn-on time of the high-side FET without degrading
the turn-off time (Figure 8).
POR
Power-on reset (POR) occurs when V
CC
rises above
approximately 2V, resetting the fault latch and preparing
the PWM for operation. V
CC
undervoltage lockout
I
I
LOAD
= I
PEAK
/2
ON-TIME
0
TIME
I
PEAK
L
V
BATT
- V
OUT
i
t
=
Figure 6. Pulse-Skipping/Discontinuous Crossover Point
I
I
LIMIT
I
LOAD
0
TIME
I
PEAK
Figure 7. “Valley” Current-Limit Threshold Point
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