參數(shù)資料
型號(hào)： MAX1711
廠商： Maxim Integrated Products, Inc.
英文描述： High-Speed, Digitally Adjusted Step-Down Controllers for Notebook CPUs
中文描述： 高速、數(shù)字可調(diào)、降壓型控制器，用于筆記本電腦
文件頁(yè)數(shù)： 18/28頁(yè)
文件大小： 299K
代理商： MAX1711
M
High-S peed, Digitally Adjusted
S tep-Down Controllers for Notebook CPUs
18
______________________________________________________________________________________
is cheap and can work well at 200kHz. The core must be
large enough not to saturate at the peak inductor current
(I
PEAK
).
I
PEAK
= I
LOAD(MAX)
+ (LIR / 2)
·
I
LOAD(MAX)
Setting the Current Limit
The minimum current-limit threshold must be great
enough to support the maximum load current when the
current limit is at the minimum tolerance value. The valley
of the inductor current occurs at I
LOAD(MAX)
minus half
of the ripple current, therefore:
I
LIMIT(LOW)
> I
LOAD(MAX)
- (LIR / 2)
·
I
LOAD(MAX)
where I
LIMIT(LOW)
= minimum current-limit threshold volt-
age divided by the R
DS(ON)
of Q2. For the MAX1710, the
minimum current-limit threshold (100mV default setting)
is 90mV. Use the worst-case maximum value for R
DS(ON)
from the MOSFET Q2 data sheet, and add some margin
for the rise in R
DS(ON)
with temperature. A good general
rule is to allow 0.5% additional resistance for each °C of
temperature rise.
Examining the 7A notebook CPU circuit example with a
maximum R
DS(ON)
= 15m
at high temperature reveals
the following:
I
LIMIT(LOW)
= 90mV / 15m
= 6A
6A is greater than the valley current of 5.25A, so the cir-
cuit can easily deliver the full rated 7A using the default
100mV nominal ILIM threshold.
When adjusting the current limit, use a 1% tolerance R
LIM
resistor to prevent a significant increase of errors in the
current-limit tolerance.
Output Capacitor Selection
The output filter capacitor must have low enough effective
series resistance (ESR) to meet output ripple and load-
transient requirements, yet have high enough ESR to sat-
isfy stability requirements. Also, the capacitance value
must be high enough to absorb the inductor energy
going from a full-load to no-load condition without tripping
the overvoltage protection circuit.
In CPU V
CORE
converters and other applications where
the output is subject to violent load transients, the output
capacitor’s size depends on how much ESR is needed to
prevent the output from dipping too low under a load
transient. Ignoring the sag due to finite capacitance:
V
I
LOAD MAX
(
In non-CPU applications, the output capacitor’s size
depends on how much ESR is needed to maintain an
acceptable level of output voltage ripple:
The actual microfarad capacitance value required relates
to the physical size needed to achieve low ESR, as well
as to the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value (this is true of tantalums,
OS-CONs, and other electrolytics).
When using low-capacity filter capacitors such as ceram-
ic or polymer types, capacitor size is usually determined
by the capacity needed to prevent the overvoltage pro-
tection circuit from being tripped when transitioning from
a full-load to a no-load condition. The capacitor must be
large enough to prevent the inductor’s stored energy from
launching the output above the overvoltage protection
threshold. Generally, once enough capacitance is added
to meet the overshoot requirement, undershoot at the ris-
ing load edge is no longer a problem (see also V
SAG
equation under Design Procedure).
With integrators disabled, the amount of overshoot due to
stored inductor energy can be calculated as:
where I
PEAK
is the peak inductor current. To absolutely
minimize the overshoot, disable the integrator first, since
the inherent delay of the integrator can cause extra “run-
on” switching cycles to occur after the load change.
Output Capacitor Stability Considerations
Stability is determined by the value of the ESR zero rela-
tive to the switching frequency. The point of instability is
given by the following equation:
For a typical 300kHz application, the ESR zero frequency
must be well below 95kHz, preferably below 50kHz.
Tantalum and OS-CON capacitors in widespread use at
the time of publication have typical ESR zero frequencies
of 15kHz. In the design example used for inductor selec-
tion, the ESR needed to support 50mVp-p ripple is
50mV/3.5A = 14.2m
. Three 470μF/4V Kemet T510 low-
ESR tantalum capacitors in parallel provide 15m
max
ESR. Their typical combined ESR results in a zero at
14.1kHz, well within the bounds of stability.
f
f
π
where f
R
C
ESR
ESR
ESR
F
=
=
π
1
2
V
C
V
L I
C
V
OUT
OUT2
PEAK2
OUT
OUT
=
+
R
Vp p
LIR I
ESR
LOAD MAX
≤
-
(
)
R
ESR
DIP
≤
)
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