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參數(shù)資料
| 型號(hào)： | MAX1711 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | High-Speed, Digitally Adjusted Step-Down Controllers for Notebook CPUs |
| 中文描述： | 高速、數(shù)字可調(diào)、降壓型控制器，用于筆記本電腦 |
| 文件頁數(shù)： | 16/28頁 |
| 文件大?。?/td> | 299K |
| 代理商： | MAX1711 |
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M
High-S peed, Digitally Adjusted
S tep-Down Controllers for Notebook CPUs
16
______________________________________________________________________________________
DL is also kept high continuously when V
CC
UVLO is
active as well as in Shutdown1 mode (Table 3).
Overvoltage protection can be defeated via the
OVP
input (MAX1710 only) or via a
SKIP
test mod
e (se
e Pin
Description.
Output Undervoltage Protection (UVP)
The output undervoltage protection function is similar to
foldback current limiting, but employs a timer rather than
a variable current limit. If the MAX1710 output (FB) is
under 70% of the nominal value 20ms after coming out of
shutdown, the PWM is latched off and won’t restart until
V
CC
power is cycled or
SHDN
is toggled. For the
MAX1711, the nominal UVP trip threshold is fixed at 0.8V.
No-Fault Test Mode
The over/undervoltage protection features can compli-
cate the process of debugging prototype breadboards,
since there are (at most) a few milliseconds in which to
determine what went wrong. Therefore, a test mode is
provided to totally disable the OVP, UVP, and thermal
shutdown features, and clear to the fault latch if it has
been previously set. The PWM operates as if
SKIP
were
grounded (PFM/PWM mode).
The no-fault test mode is entered by sinking 1.5mA
from
SKIP
via an external negative voltage source in
series with a resistor (Figure 6).
SKIP
is clamped to
GND with a silicon diode, so choose the resistor value
equal to (V
FORCE
- 0.65V) / 1.5mA.
Design Procedure
Firmly establish the input voltage range and maximum
load current before choosing a switching frequency and
inductor operating point (ripple current ratio). The prima-
SHDN
SKIP
OVP
DL
MODE
COMMENTS
1
X
0
X
0
High
Shutdown1
Low-power shutdown state. DL is forced to V
DD
, enforcing OVP. I
CC
< 1μA typ.
X
Low
0
X
1
Low
Shutdown2
Low-power shutdown state. DL is forced to GND, disabling OVP. I
CC
< 1μA typ.
Exiting shutdown triggers a soft-start cycle.
Shutdown3
(MAX1711
only)
DAC code = X1111 (see Table 2) DL is forced to PGND, DH is forced to LX. The
MAX1711 eventually goes into UVP fault mode as the load current discharges the
output.
1
Below
GND
X
Switching
No Fault
Test mode with OVP, UVP, and thermal faults disabled and latches cleared.
Otherwise normal operation, with automatic PWM/PFM switchover for pulse
skipping at light loads (Figure 6).
1
X
1
Switching
No OVP
OVP faults disabled and OVP latch cleared. Otherwise normal operation,
with
SKIP
controlling PWM/PFM switchover.
1
V
CC
X
Switching
Run (PWM),
Low Noise
Low-noise operation with no automatic switchover. Fixed-frequency PWM action
is forced regardless of load. Inductor current reverses at light load levels.
I
CC
draw = 750μA typ. I
DD
draw = 15mA typ.
Normal operation with automatic PWM/PFM switchover for pulse skipping at light
loads. I
CC
= 600μA typ. I
DD
draw = load dependent.
Fault latch has been set by OVP, output UVLO, or thermal shutdown. Device will
remain in FAULT mode until V
CC
power is cycled,
SKIP
is forced below ground,
or
SHDN
is toggled.
1
GND
X
Switching
Run
(PFM/PWM)
1
X
X
High
Fault
Table 3. Operating Mode Truth Table
Good operating point for
compound buck designs
or desktop circuits.
+5V-input notebook
CPU core
550
400
3-cell Li+ notebook
CPU core
Useful in 4-cell systems
for lighter loads than the
CPU or where size is key.
Considered mainstream
by current standards.
4-cell Li+ notebook
CPU core
300
200
4-cell Li+ notebook
CPU core
Use for absolute best
efficiency.
COMMENT
TYPICAL
APPLICATION
FREQUENCY
(kHz)
Table 4. Frequency Selection Guidelines
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