參數(shù)資料
型號(hào): MAX16049ATN+
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 電源管理
英文描述: 8-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC56
封裝: 8 X 8 MM, ROHS COMPLIANT, TQFN-56
文件頁(yè)數(shù): 8/61頁(yè)
文件大?。?/td> 790K
代理商: MAX16049ATN+
MAX16047A/MAX16049A
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
16
______________________________________________________________________________________
Table 1. EEPROM Software Enable Configurations
REGISTER/
EEPROM ADDRESS
BIT RANGE
DESCRIPTION
0
Software Enable bit
0 = Enabled. EN must also be high to begin sequencing
1 = Disabled (factory default)
1
Margin bit
1 = Margin functionality is enabled
0 = Margin disabled
2
Early Warning Selection bit
0 = Early warning thresholds are undervoltage thresholds
1 = Early warning thresholds are overvoltage thresholds
3
Watchdog Mode Selection bit
0 = Watchdog timer is in dependent mode
1 = Watchdog timer is in independent mode
4Dh
[7:4]
Not used
Enable
To initiate sequencing/tracking and enable monitoring,
the voltage at EN must be above 0.525V and the
Software Enable bit in r4Dh[0] must be set to ‘0.’ To
power down and disable monitoring, either pull EN
below 0.5V or set the Software Enable bit to ‘1.’ See
Table 1 for the software enable bit configurations.
Connect EN to ABP if not used.
If a fault condition occurs during the power-up cycle,
the EN_OUT_ outputs are powered down immediately,
independent of the state of EN. If operating in latch-on
fault mode, toggle EN or toggle the Software Enable bit
to clear the latch condition and restart the device once
the fault condition has been removed. If EN is driven by
external logic instead of from the center tap of a VCC-
connected resistive divider, ensure that an active-high
pulse occurs on EN within 1.5ms of VCC exceeding
2.85V. If the external driving logic is in the high-imped-
ance state during power-up, this pulse can be created
by connecting an external pullup resistor to EN.
Voltage Monitoring
The MAX16047A/MAX16049A feature an internal 10-bit
ADC that monitors the MON_ voltage inputs. An internal
multiplexer cycles through each of the twelve inputs,
taking 150s (typ) for a complete monitoring cycle.
Each acquisition takes approximately 12.45s. At each
multiplexer stop, the 10-bit ADC converts the analog
input to a digital result and stores the result in a regis-
ter. ADC conversion results are stored in registers r00h
to r17h in the extended page. Use the I2C or JTAG seri-
al interface to read ADC conversion results. See the
I2C/SMBus-Compatible Serial Interface or the JTAG
Serial Interface section for more information on access-
ing the extended page.
The MAX16047A provides twelve inputs, MON1–MON12,
for voltage monitoring. The MAX16049A provides eight
inputs, MON1–MON8, for voltage monitoring. Each input
voltage range is programmable in registers r0Fh to r11h
(see Table 2). When MON_ configuration registers are set
to ‘11,’ MON_ voltages are not monitored or converted,
and the multiplexer does not stop at these inputs,
decreasing the total cycle time. These inputs cannot be
configured to trigger fault conditions.
The three programmable thresholds for each monitored
voltage include an overvoltage, an undervoltage, and
an early warning threshold that can be set in r4Dh[2] to
be either an undervoltage or overvoltage threshold. See
the
Faults section for more information on setting over-
voltage and undervoltage thresholds. All voltage
thresholds are 8 bits wide. The 8 MSBs of the 10-bit
ADC conversion result are compared to these overvolt-
age and undervoltage thresholds.
For any undervoltage or overvoltage condition to be
monitored and any faults detected, the MON_ input
must be assigned to a particular sequence order. See
the
Sequencing section for more details on assigning
MON_ inputs.
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