- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄2008 > MAX11210EEE+T (Maxim Integrated Products)ADC 24BIT 4WIRE SPI 16-QSOP PDF資料下載
參數(shù)資料
| 型號(hào)： | MAX11210EEE+T |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 13/27頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | ADC 24BIT 4WIRE SPI 16-QSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 24 |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 667mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-QSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類(lèi)型： | 1 個(gè)差分，單極；1 個(gè)差分，雙極 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)當(dāng)前第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)
20
Maxim Integrated
24-Bit, Single-Channel, Ultra-Low-Power,
Delta-Sigma ADCs with GPIO
MAX11200/MAX11210
CTRL2: Control 2 Register
The byte-wide CTRL2 register is a bidirectional read/write register. The byte written to the CTRL2 register controls the
direction and values of the digital I/O ports.
DIR[4:1]: The direction bits configure the direction of the DIO bit. When a DIR bit is set to 0, the associated DIO bit
is configured as an input and the value returned by a read of the DIO bit is the value being driven on the associated
GPIO. When a DIR bit is set to 1, the associated DIO bit is configured as an output and the GPIO port is driven to a
logic value of the associated DIO bit.
DIO[4:1]: The data input/output bits are bits associated with the GPIO ports. When a DIO is configured as an input,
the value read from the DIO bit is the logic value being driven at the GPIO port. When the direction is configured as an
output, the GPIO port is driven to a logic value associated with the DIO bit.
CTRL3: Control 3 Register
The byte-wide CTRL3 register is a bidirectional read/write register. The CTRL3 register controls the operation and
calibration of the device.
DGAIN[2:0] (MAX11210 Only): The digital gain bits control the input referred gain. With a gain of 1, the input range
is 0 to VREF (unipolar) or ±VREF (bipolar). As the gain in increased by 2x, the input range is reduced to 0 to VREF/gain
or ±VREF/gain. Digital gain is applied to the final offset and gain-calibrated digital data. The DGAIN[2:0] bits decode
to digital gains as follows:
000 = 1
001 = 2
010 = 4
011 = 8
100 = 16
NOSYSG: The no-system gain bit, NOSYSG, controls the system gain calibration coefficient. A 1 in this bit location
disables the use of the system gain value when computing the final offset and gain corrected data value. A 0 in this
location enables the use of the system gain value when computing the final offset and gain corrected data value.
NOSYSO: The no system offset bit, NOSYSO, controls the system offset calibration coefficient. A 1 in this location
disables the use of the system offset value when computing the final offset and gain corrected data value. A 0 in this
location enables the use of the system offset value when computing the final offset and gain corrected data value.
NOSCG: The no self-calibration gain bit, NOSCG, controls the self-calibration gain coefficient. A 1 in this location
disables the use of the self-calibration gain value when computing the final offset and gain corrected data value. A 0
in this location enables the use of the self-calibration gain value when computing the final offset and gain corrected
data value.
NOSCO: The no self-calibration offset bit, NOSCO, controls the use of the self-calibration offset coefficient. A 1 in this
location disables the use of the self-calibration offset value when computing the final offset and gain corrected data
value. A 0 in this location enables the use of the self-calibration offset value when computing the final offset and gain
corrected data value.
Table 13. CTRL2 Register (Read/Write)
Table 14. CTRL3 Register (Read/Write)
*These DGAIN_ bits are don’t-care bits for the MAX11200.
BIT
B7
B6
B5
B4
B3
B2
B1
B0
BIT NAME
DIR4
DIR3
DIR2
DIR1
DIO4
DIO3
DIO2
DIO1
DEFAULT
0
1
BIT
B7
B6
B5
B4
B3
B2
B1
B0
BIT NAME
DGAIN2*
DGAIN1*
DGAIN0*
NOSYSG
NOSYSO
NOSCG
NOSCO
RESERVED
DEFAULT
0
1
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX11212BEUB+T | IC ADC 18BIT SRL 13.75SPS 10UMAX |
| MAX1135BCAP+ | IC ADC 16BIT 150KSPS 20-SSOP |
| MAX1138LEEE+T | IC ADC 10BIT SERIAL 16-QSOP |
| MAX1159AEUI+ | IC ADC 14BIT 135KSPS 28-TSSOP |
| MAX11602EEE+ | IC ADC SERIAL 8BIT 8CH 16-QSOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX11210EVKIT+ | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開(kāi)發(fā)工具 EVKIT for MAX11210 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類(lèi)型:ADC 工具用于評(píng)估:ADS130E08 接口類(lèi)型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX11211 | 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:18-Bit, Single-Channel, Ultra-Low-Power, Delta-Sigma ADCs with Programmable Gain and GPIO |
| MAX11211EEE+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 18-Bit Delta-Sigma RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX11211EEE+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 18-Bit Delta-Sigma RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX11212 | 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:18-Bit, Single-Channel, Ultra-Low Power, Delta-Sigma ADC with 2-Wire Serial Interface |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。