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參數資料
| 型號： | M80XXLFXI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時鐘產生/分配 |
| 英文描述： | OTHER CLOCK GENERATOR, QCC24 |
| 封裝： | 4 X 4 MM, LEAD FREE, MO-220, QFN-24 |
| 文件頁數： | 11/17頁 |
| 文件大?。?/td> | 526K |
| 代理商： | M80XXLFXI |
MoBL Clock
M4000/M8000
Document Number: 001-29179 Rev. *C
Page 3 of 17
Pinouts
MoBL Clock M4000
Figure 1. Pin Diagram - 24LD QFN
D
N
U
CLK1
PD#/OE
MoBL Clock M4000
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
GN
D
GND
VDD_CLK_B1
VDD
CLK2
C
L
K
3
C
L
K
4
G
N
D
CLK5
VDD_CLK_B2
CLK6/SSON
VDD_CLK_B3
CLK7
GND
CL
K
8
V
D
X
O
U
T
X
IN
/
E
X
C
L
K
IN
G
N
D
24 LD QFN
S
D
A
S
C
L
Table 1. Pin Definitions - MoBL Clock M4000 Family (VDD = 1.8 V Supply)
Pin Number
Name
IO
Description
1
GND
Power
Power Supply Ground
2
CLK1
Output
Programmable Clock Output,
Output voltage depends on VDD_CLK_B1 voltage
3
VDD_CLK_B1 Power
Power Supply for Bank1 (CLK1, CLK2) outputs: 1.5 V/1.8 V/2.5 V/3.0 V/3.3 V
4
PD#/OE
Input
Multifunction Programmable pin: Output Enable or Power Down Modes
5
VDD
Power
Power Supply: 1.8 V
6
CLK2
Output
Programmable Clock Output.
Output voltage depends on VDD_CLK_B1 voltage
7
GND
Power
Power Supply Ground
8
SCL
Input
Serial Data Clock
9
SDA
Input/Output
Serial Data Input/Output
10
CLK3
Output
Programmable Clock Output.
Output voltage depends on VDD_CLK_B2 voltage
11
CLK4
Output
Programmable Clock Output.
Output voltage depends on VDD_CLK_B2 voltage
12
GND
Power
Power Supply Ground
13
CLK5
Output
Programmable Clock Output.
Output voltage depends on VDD_CLK_B2 voltage
14
VDD_CLK_B2 Power
Power Supply for Bank2 (CLK3, CLK4, CLK5) outputs: 1.5 V/1.8 V/2.5 V/3.0 V/3.3 V
15
CLK6/SSON
Output/Input
Multifunction Programmable pin: Programmable Clock Output or
Spread Spectrum
control input pin. Output voltage depends on VDD_CLK_B3 voltage
16
VDD_CLK_B3 Power
Power Supply for Bank3 (CLK6, CLK7, CLK8) outputs: 1.5 V/1.8 V/2.5 V/3.0 V/3.3 V
17
CLK7
Output
Programmable Clock Output.
Output voltage depends on VDD_CLK_B3 voltage
18
GND
Power
Power Supply Ground
19
GND
Power
Power Supply Ground
20
CLK8
Output
Programmable Clock Output.
Output voltage depends on VDD_CLK_B3 voltage
21
DNU
Input
Do Not Use
22
VDD
Power
Power Supply: 1.8 V
23
XOUT
Output
Crystal Output
24
XIN/EXCLKIN
Input
Crystal Input or 1.8 V External Reference Clock Input
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