參數(shù)資料
型號： M5M4V4265CTP-7S
廠商： Mitsubishi Electric Corporation
英文描述： EDO (HYPER PAGE) MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM
中文描述： 江戶（超頁）模式4194304位（262144字由16位）動(dòng)態(tài)隨機(jī)存儲(chǔ)器
文件頁數(shù)： 6/31頁
文件大小： 311K
代理商： M5M4V4265CTP-7S
EDO (HYPER PAGE) MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM
M5M4V4265CJ,TP-5,-6,-7,-5S,-6S,-7S
MITSUBISHI LSIs
M5M4V4265CJ,TP-5,-5S:under development
6
Read-Write and Read-Modify-Write Cycles
Limits
Parameter
Read write/read modify write cycle time
RAS low pulse width
CAS low pulse width
CAS hold time after RAS low
RAS hold time after CAS low
Read setup time before CAS low
Delay time, CAS low to W low
Delay time, RAS low to W low
Delay time, address to W low
OE hold time after W low
Note 23 :
t
RWC
is specified as
t
RWC(min)
=
t
RAC(max)
+
t
ODD(min)
+
t
RWL(min)
+
t
RP(min)
+4
t
T
.
Note
24 :
t
WCS
,
t
CWD
,
t
RWD
and
t
AWD
and
t
CPWD
are specified as reference points only. If
t
WCS
≥
t
WCS(min)
the cycle is an early write cycle and the DQ pins
will remain high impedance throughout the entire cycle. If
t
CWD
≥
t
CWD(min)
,
t
RWD
≥
t
RWD(min)
,
t
AWD
≥
t
AWD(min)
and
t
CPWD
≥
t
CPWD(min)
(for EDO mode cycle only), the cycle is a read-modify-write cycle and the DQ will contain the data read from the selected address.
If neither of the above condition (delayed write) of the DQ (at access time and until CAS or OE goes back to V
IH
) is indeterminate.
Symbol
t
RWC
t
RAS
t
CAS
t
CSH
t
RSH
t
RCS
t
CWD
t
RWD
t
AWD
t
OEH
Unit
Min
133
Max
Min
161
Max
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 23)
(Note 24)
(Note 24)
(Note 24)
15
20
10000
10000
10000
10000
44
89
44
82
0
32
77
47
57
107
57
99
0
42
92
57
M5M4V4265C-6,-6S
M5M4V4265C-7,-7S
Write Cycle (Early Write and Delayed Write)
Limits
Parameter
Write cycle time
RAS low pulse width
CAS low pulse width
CAS hold time after RAS low
RAS hold time after CAS low
Symbol
t
WC
t
RAS
t
CAS
t
CSH
t
RSH
t
WCS
t
WCH
t
CWL
t
RWL
t
WP
t
DS
t
DH
Unit
Min
110
60
10
48
15
Max
Min
130
70
10
55
20
Max
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Write setup time before CAS low
Write hold time after CAS low
CAS hold time after W low
RAS hold time after W low
Write pulse width
(Note 24)
10000
10000
10000
10000
10
10
10
10
0
10
0
Data setup time before CAS low or W low
Data hold time after CAS low or W low
13
13
13
0
13
0
13
M5M4V4265C-6,-6S
M5M4V4265C-7,-7S
Min
90
50
8
40
13
Max
10000
10000
8
8
8
8
0
8
0
M5M4V4265C-5,-5S
Min
109
Max
13
10000
10000
38
0
28
65
40
75
38
70
M5M4V4265C-5,-5S
相關(guān)PDF資料
PDF描述
M5M4V4405CJ EDO (HYPER PAGE MODE) 4194304-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM
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M5M4V4405CTP-6S EDO (HYPER PAGE MODE) 4194304-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM
M5M4V4405CTP-7 EDO (HYPER PAGE MODE) 4194304-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M5M4V4405CJ 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO (HYPER PAGE MODE) 4194304-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM
M5M4V4405CJ-6 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO (HYPER PAGE MODE) 4194304-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM
M5M4V4405CJ-6S 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO (HYPER PAGE MODE) 4194304-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM
M5M4V4405CJ-7 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO (HYPER PAGE MODE) 4194304-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM
M5M4V4405CJ-7S 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO (HYPER PAGE MODE) 4194304-BIT(1048576-WORD BY 4-BIT) DYNAMIC RAM
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