參數(shù)資料
型號(hào)： M50FLW080BN5G
廠商： STMICROELECTRONICS
元件分類(lèi)： PROM
英文描述： 1M X 8 FLASH 3V PROM, 11 ns, PDSO40
封裝： 10 X 20 MM, ROHS COMPLIANT, PLASTIC, TSOP-40
文件頁(yè)數(shù)： 20/64頁(yè)
文件大?。?/td> 534K
代理商： M50FLW080BN5G
M50FLW080A, M50FLW080B
Command interface
4.5
Quadruple Byte Program command (A/A Mux interface)
The Quadruple Byte Program Command is used to program four adjacent Bytes in the
memory array at a time. The four Bytes must differ only for addresses A0 and A1.
Programming should not be attempted when VPP is not at VPPH.
Five Bus Write operations are required to issue the command. The second, third and fourth
Bus Write cycles latch the respective addresses and data of the first, second and third Bytes
in the Program/Erase Controller. The fifth Bus Write cycle latches the address and data of
the fourth Byte and starts the Program/Erase Controller. Once the command is issued,
subsequent Bus Read operations read the value in the Status Register. (See the section on
the Status Register for details on the definitions of the Status Register bits.)
During the Quadruple Byte Program operation, the memory will only accept the Read Status
Register and Program/Erase Suspend commands. All other commands are ignored.
Note that the Quadruple Byte Program command cannot change a bit set to ‘0’ back to ‘1’
and attempting to do so will not modify its value. One of the erase commands must be used
to set all of the bits in the block to ‘1’.
See Figure 23, for a suggested flowchart on using the Quadruple Byte Program command.
Typical Quadruple Byte Program times are given in Table 18.
4.6
Double/Quadruple Byte Program command (FWH mode)
The Double/Quadruple Byte Program Command can be used to program two/four adjacent
Bytes to the memory array at a time. The two Bytes must differ only for address A0; the four
Bytes must differ only for addresses A0 and A1.
Two Bus Write operations are required to issue the command. The second Bus Write cycle
latches the start address and two/four data Bytes and starts the Program/Erase Controller.
Once the command is issued, subsequent Bus Read operations read the contents of the
Status Register. (See the section on the Status Register for details on the definitions of the
Status Register bits.)
During the Double/Quadruple Byte Program operation the memory will only accept the Read
Status register and Program/Erase Suspend commands. All other commands are ignored.
Note that the Double/Quadruple Byte Program command cannot change a bit set to ‘0’ back
to ‘1’ and attempting to do so will not modify its value. One of the erase commands must be
used to set all of the bits in the block to ‘1’.
See Figure 22, for a suggested flowchart on using the Double/Quadruple Byte Program
command. Typical Double/Quadruple Byte Program times are given in Table 18.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M50FLW080BN5P 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:8 Mbit (13 x 64KByte Blocks + 3 x 16 x 4KByte Sectors), 3V Supply Firmware Hub / Low Pin Count Flash Memory
M50FLW080BN5T 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:8 Mbit (13 x 64KByte Blocks + 3 x 16 x 4KByte Sectors), 3V Supply Firmware Hub / Low Pin Count Flash Memory
M50FLW080BN5TG 功能描述:IC FLASH 8MBIT 33MHZ 40TSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類(lèi)型:移動(dòng) SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱(chēng):557-1327-2
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