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參數(shù)資料
| 型號： | M41ST84Y |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS |
| 中文描述： | 5.0或3.0V，512位64 × 8串行實時時鐘與監(jiān)督職能 |
| 文件頁數(shù)： | 3/31頁 |
| 文件大?。?/td> | 452K |
| 代理商： | M41ST84Y |
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11/31
M41ST84Y, M41ST84W
Table 7. AC Characteristics
Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 2.7 to 3.6V or 4.5 to 5.5V (except where noted).
2. Transmitter must internally provide a hold time to bridge the undefined region (300ns max) of the falling edge of SCL.
Symbol
Parameter(1)
Min
Max
Unit
fSCL
SCL Clock Frequency
0
400
kHz
tBUF
Time the bus must be free before a new transmission can start
1.3
s
tF
SDA and SCL Fall Time
300
ns
tHD:DAT
(2)
Data Hold Time
0
s
tHD:STA
START Condition Hold Time
(after this period the first clock pulse is generated)
600
ns
tHIGH
Clock High Period
600
ns
tLOW
Clock Low Period
1.3
s
tR
SDA and SCL Rise Time
300
ns
tSU:DAT
Data Setup Time
100
ns
tSU:STA
START Condition Setup Time
(only relevant for a repeated start condition)
600
ns
tSU:STO
STOP Condition Setup Time
600
ns
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