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參數(shù)資料
| 型號： | M41ST84Y |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS |
| 中文描述： | 5.0或3.0V，512位64 × 8串行實(shí)時時鐘與監(jiān)督職能 |
| 文件頁數(shù)： | 14/31頁 |
| 文件大?。?/td> | 452K |
| 代理商： | M41ST84Y |
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M41ST84Y, M41ST84W
Power-on Reset
The M41ST84Y/W continuously monitors VCC.
When VCC falls to the power fail detect trip point,
the RST pulls low (open drain) and remains low on
power-up for tREC after VCC passes VPFD(max).
The RST pin is an open drain output and an appro-
priate pull-up resistor should be chosen to control
rise time.
Reset Input (RSTIN)
The M41ST84Y/W provides an independent input
which can generate an output reset. The duration
and function of this reset is identical to a reset gen-
erated by a power cycle. Table 12, page 21 and
Figure 19, page 21 illustrate the AC reset charac-
teristics of this function. Pulses shorter than tRLRH
will not generate a reset condition. RSTIN is inter-
nally pulled up to VCC through a 100k resistor.
Figure 19. RSTIN Timing Waveform
Note: With pull-up resistor
Table 12. Reset AC Characteristics
Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 2.7 to 3.6V or 4.5 to 5.5V (except where noted).
2. Pulse width less than 50ns will result in no RESET (for noise immunity).
3. Programmable (see Table 14, page 23)
Symbol
Parameter(1)
Min
Max
Unit
tRLRH
(2)
RSTIN Low to RSTIN High
200
ns
tRHRSH
(3)
RSTIN High to RST High
40
200
ms
AI03682
RST
(1)
RSTIN
tRLRH
tRHRSH
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