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參數(shù)資料
| 型號： | M41ST84Y |
| 廠商： | 意法半導體 |
| 英文描述： | 5.0 or 3.0V, 512 bit 64 x 8 SERIAL RTC with SUPERVISORY FUNCTIONS |
| 中文描述： | 5.0或3.0V，512位64 × 8串行實時時鐘與監(jiān)督職能 |
| 文件頁數(shù)： | 10/31頁 |
| 文件大?。?/td> | 452K |
| 代理商： | M41ST84Y |
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M41ST84Y, M41ST84W
18/31
Setting Alarm Clock Registers
Address locations 0Ah-0Eh contain the alarm set-
tings. The alarm can be configured to go off at a
prescribed time on a specific month, date, hour,
minute, or second, or repeat every year, month,
day, hour, minute, or second. It can also be pro-
grammed to go off while the M41ST84Y/W is in the
battery back-up to serve as a system wake-up call.
Bits RPT5-RPT1 put the alarm in the repeat mode
of operation. Table 10, page 18 shows the possi-
ble configurations. Codes not listed in the table de-
fault to the once per second mode to quickly alert
the user of an incorrect alarm setting.
When the clock information matches the alarm
clock settings based on the match criteria defined
by RPT5-RPT1, the AF (Alarm Flag) is set. If AFE
(Alarm Flag Enable) is also set, the alarm condi-
tion activates the IRQ/FT/OUT pin.
Note: If the address pointer is allowed to incre-
ment to the Flag Register address, an alarm con-
dition will not cause the Interrupt/Flag to occur until
the address pointer is moved to a different ad-
dress. It should also be noted that if the last ad-
dress written is the “Alarm Seconds,” the address
pointer will increment to the Flag address, causing
this situation to occur.
The IRQ/FT/OUT output is cleared by a READ to
the Flags Register as shown in Figure 17. A sub-
sequent READ of the Flags Register is necessary
to see that the value of the Alarm Flag has been
reset to '0.'
The IRQ/FT/OUT pin can also be activated in the
battery back-up mode. The IRQ/FT/OUT will go
low if an alarm occurs and both ABE (Alarm in Bat-
tery Back-up Mode Enable) and AFE are set. The
ABE and AFE Bits are reset during power-up,
therefore an alarm generated during power-up will
only set AF. The user can read the Flag Register
at system boot-up to determine if an alarm was
generated while the M41ST84Y/W was in the de-
select mode during power-up. Figure 18, page 19
illustrates the back-up mode alarm timing.
Figure 17. Alarm Interrupt Reset Waveform
Table 10. Alarm Repeat Modes
RPT5
RPT4
RPT3
RPT2
RPT1
Alarm Setting
1
1111
Once per Second
1
1110
Once per Minute
1
1100
Once per Hour
1
1000
Once per Day
1
0000
Once per Month
0
0000
Once per Year
AI03664
IRQ/FT/OUT
ACTIVE FLAG
0Fh
0Eh
10h
HIGH-Z
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