APPLICATION
2.6 Serial I/O2
3820 GROUP USER’S MANUAL
2–154
2.6.5 Notes on use
(1) Notes on synchronizing clock selection
Whether an internal clock or an external clock is selected as a serial I/O2 synchronizing clock source,
the serial I/O2 interrupt request bit is set to “1” when 8 shift clocks are input.
However, while the shift clocks are input to the serial I/O2 synchronization circuit, the contents of the
serial I/O2 register are continuously shifted. For this reason, it is necessary to stop the shift clocks
at the time when 8 shift clocks have been input. When an internal clock is selected, the shift clocks
are automatically stopped at the time when 8 shift clocks have been input.
When an external clock is selected, control shift clocks externally. As an external clock, satisfy the
following conditions when the duty cycle is 50%.
1 MHz or less (1000 ns min.) ........................at V
CC
= 4.0 V to 5.5 V
500 kHz or less (2000 ns min.) .....................at V
CC
= 2.5 V to 4.0 V
Furthermore, satisfy the following conditions of both “H” and “L” width when changing the duty cycle.
400 ns or more .................................................at V
CC
= 4.0 V to 5.5 V
950 ns or more .................................................at V
CC
= 2.5 V to 4.0 V
(2) Notes on shift clock source switching
When the shift clock of the serial I/O2 has been switched, initialize the serial I/O counter 2 (i.e., write
to the serial I/O2 register).
(3) Serial I/O counter 2 initialization when an external clock is selected
When an external clock is selected, initialize the serial I/O counter 2 (i.e., write to the serial I/O2
register) at “H” level of the external clock.
(4) For serial I/O2 interrupts
To use a serial I/O2 interrupt, set according to the following procedure.
Set the serial I/O2 interrupt enable bit (bit 6 at address 003F
16
) to “0” with the
CLB
instruction.
Set a value in the serial I/O2 control register (address 001D
16
).
After executing one or more instructions (e.g.,
NOP
instruction), set the serial I/O2 interrupt request
bit (bit 6 at address 003D
16
) to “0” with the
CLB
instruction.
Set the serial I/O2 interrupt enable bit to “1” with the
SEB
instruction.
(5) Restart of communication after stopping it during serial transmission or reception
To restart communication after stopping it during serial I/O2 transmission or reception, execute from
writing into the serial I/O2 control register.