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MITSUBISHI MICROCOMPUTERS
M37754M8C-XXXGP, M37754M8C-XXXHP
M37754S4CGP, M37754S4CHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
60
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Fig. 72 D-A converter block diagram
D-A CONVERTER
The D-A converter is an 8-bit R-2R method D-A converter and con-
sists of two independent D-A converters. Figure 72 shows the block
diagram of the D-A converter and Figure 73 shows the bit configura-
tion of A-D control register 1.
D-A conversion is performed by writing a value in the corresponding
D-A register. The conversion result is output by bits 6 and 7 of A-D
control register 1 (address 1F
16
). When bit 7 is “1”, the conversion
result is output from DA
0
pin.
When bit 6 is “1”, the conversion result is output from DA
1
pin.
The output analog voltage V is determined according to the value n
(“n” is a decimal number) set in the D-A register.
V = V
REF
×
n/256 (n = 0 to 255)
V
REF
: Reference voltage
The D-A output enable bit is cleared to “0” at reset. Whether to con-
nect the reference voltage input (V
REF
) with the ladder network or not
depends on bit 5 of the A-D control register 1. The V
REF
pin is con-
nected when bit 5 is “0” and is disconnected when bit 5 is “1” (High
impedance state).
Fig. 73 A-D control register 1 bit configuration
7
× × × × ×
6 5 4 3 2 1 0
Not used for D-A converter
V
REF
connection select bit (Note)
0 : V
REF
is connected
1 : V
REF
is not connected
D-A
1
output enable bit
0 : Disable output
1 : Enable output
D-A
0
output enable bit
0 : Disable output
1 : Enable output
A-D control register 1
Address
1F
16
When A-D or D-A conversion is not performed, current from the V
REF
pin to the ladder network can be cut off by disconnecting ladder net-
work from the V
REF
pin.
Before starting A-D or D-A conversion, wait for 1
μ
s or more after
clearing bit 5 to “0”. An external buffer must be connected when con-
necting to a low impedance load because there is no built-in D-A out-
put buffer.
Note :
When the expansion function select bit (bit 5 of peripheral
function select register 1 ; refer to Fig. 62) is “1,” bit 5 can be
written and changed.
R-2R ladder network
D-A
0
output
enable bit
D-A register 0
(Address 68
16
)
D-A
0
pin
AV
SS
R-2R ladder network
Data bus (even)
D-A
1
output
enable bit
D-A register 1
(Address 6A
16
)
D-A
1
pin
AV
SS
V
REF
V
REF
connection
select