參數(shù)資料
型號: M37280MKH-XXXSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP64
封裝: 0.750 INCH, PLASTIC, SDIP-64
文件頁數(shù): 9/171頁
文件大?。?/td> 1465K
代理商: M37280MKH-XXXSP
106
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37280MFH–XXXSP, M37280MKH–XXXSP
M37280EKSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.0
Fig. 8.11.42 Bottom Border Control Register 2
Fig. 8.11.41 Bottom Border Control Register 1
b7 b6 b5 b4 b3 b2 b1 b0
Bottom border control register 1 (BB1) [Address 021D16]
B
Name
Functions
After reset
R W
Bottom Border Control Register 1
0
to
7
Control bits of
bottom border
(BB10 to BB17)
Bottom border position (low-order 8 bits)
TH
(setting value of low-order 2 bits of BB2 162
+ setting value of high-order 4 bits of BB1 161
+ setting value of low-order 4 bits of BB1 160)
Indeterminate RW
Notes 1: Set values fit for the following condition:
(TB1 + TB2 162) < (BB1 + BB2 162).
2: TH is cycle of HSYNC.
3: BB2 is bottom border control reigster 2.
b7 b6 b5 b4 b3 b2 b1 b0
Bottom border control register 2 (BB2) [Address 021F16]
B
Name
Functions
After reset
R W
Bottom Border Control Register 2
0, 1 Control bits of
bottom border
(BB20, BB21)
Bottom border position (high-order 2 bits)
TH
(setting value of low-order 2 bits of BB2 162
+ setting value of high-order 4 bits of BB1 161
+ setting value of low-order 4 bits of BB1 160)
Indeterminate RW
Nothing is assigned. These bits are write disable bits.
When these bits are read out, the values are indeterminate.
Indeterminate R —
2
to
7
Notes 1: Set values fit for the following condition:
(TB1 + TB2 162) < (BB1 + BB2 162).
2: TH is cycle of HSYNC.
3: BB1 is bottom border control reigster 1.
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