參數(shù)資料
型號: M37280MKH-XXXSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP64
封裝: 0.750 INCH, PLASTIC, SDIP-64
文件頁數(shù): 10/171頁
文件大?。?/td> 1465K
代理商: M37280MKH-XXXSP
107
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37280MFH–XXXSP, M37280MKH–XXXSP
M37280EKSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.0
Fig. 8.11.43 Left BorderControl Register 1
Fig. 8.11.44 Left Border Control Register 2
b7 b6 b5 b4 b3 b2 b1 b0
Left border control register 1 (LB1) [Address 025016]
B
Name
Functions
After reset RW
Left Border Control Register 1
0
Control bits of
left border
(LB10 to LB17)
1
R W
1
to
7
0
Left border position (low-order 8 bits)
TOSC
(setting value of low-order 3 bits of LB2 162
+ setting value of high-order 4 bits of LB1 161
+ setting value of low-order 4 bits of LB1 160)
Notes 1: Do not set LB1 = LB2 = “0016.”
2: Set values fit for the following condition:
(LB1 + LB2 162) < (RB1 + RB2 162).
3: TOSC is OSD oscillation period.
4: LB2 is left border control register 2.
b7 b6 b5 b4 b3 b2 b1 b0
Left border control register 2 (LB2) [Address 025116]
B
Name
Functions
After reset RW
Left Border Control Register 2
Control bits of
left border
(LB20 to LB22)
0
R W
0
to
2
0
Left border position (high-order 3 bits)
TOSC
(setting value of low-order 3 bits of LB2 162
+ setting value of high-order 4 bits of LB1 161
+ setting value of low-order 4 bits of LB1 160)
Nothing is assigned. These bits are write disable bits.
When these bits are read out, the values are indeterminate.
3
to
7
R W
Notes 1: Do not set LB1 = LB2 = “0016.”
2: Set values fit for the following condition:
(LB1 + LB2 162) < (RB1 + RB2 162).
3: TOSC is OSD oscillation period.
4: LB1 is left border control register 1.
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