參數(shù)資料
型號: M3455AG8FP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP52
封裝: 10 X 10 MM, 0.65 MM PITCH, PLASTIC, LQFP-52
文件頁數(shù): 32/150頁
文件大?。?/td> 1818K
代理商: M3455AG8FP
Rev.1.02
Nov 26, 2008
Page 125 of 146
REJ03B0224-0102
455A Group
Skip condition
C
a
rry
fl
ag
CY
Detailed description
Continuous
description
Loads the value n in the immediate field to register A.
When the LA instructions are continuously coded and executed, only the first LA instruction is executed and
other LA instructions coded continuously are skipped.
Transfers bits 7 to 4 to register B and bits 3 to 0 to register A. These bits 7 to 0 are the ROM pattern in
address (DR2 DR1 DR0 A3 A2 A1 A0)2 specified by registers A and D in page p. When UPTF is 1, Transfers
bits 9, 8 to the low-order 2 bits (DR1, DR0) of register D, and “0” is stored to the least significant bit (DR2) of
register D.
When this instruction is executed, 1 stage of stack register (SK) is used.
Adds the contents of M(DP) to register A. Stores the result in register A. The contents of carry flag CY
remains unchanged.
0/1 Adds the contents of M(DP) and carry flag CY to register A. Stores the result in register A and carry flag CY.
Overflow = 0
Adds the value n in the immediate field to register A, and stores a result in register A.
The contents of carry flag CY remains unchanged.
Skips the next instruction when there is no overflow as the result of operation.
Executes the next instruction when there is overflow as the result of operation.
Takes the AND operation between the contents of register A and the contents of M(DP), and stores the result
in register A.
Takes the OR operation between the contents of register A and the contents of M(DP), and stores the result
in register A.
1
Sets (1) to carry flag CY.
0
Clears (0) to carry flag CY.
(CY) = 0
Skips the next instruction when the contents of carry flag CY is “0”. Executes the next instruction when the
contents of carry flag CY is “1”.
The contents of carry flag CY remains unchanged.
Stores the one’s complement for register A’s contents in register A.
0/1 Rotates 1 bit of the contents of register A including the contents of carry flag CY to the right.
Sets (1) the contents of bit j (bit specified by the value j in the immediate field) of M(DP).
Clears (0) the contents of bit j (bit specified by the value j in the immediate field) of M(DP).
(Mj(DP)) = 0
j = 0 to 3
Skips the next instruction when the contents of bit j (bit specified by the value j in the immediate field) of
M(DP) is “0”.
Executes the next instruction when the contents of bit j of M(DP) is “1”.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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