參數(shù)資料
型號: M34518M4-XXXFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP32
封裝: 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32
文件頁數(shù): 112/157頁
文件大?。?/td> 1783K
代理商: M34518M4-XXXFP
ML610Q411/ML610Q412/ML610Q415 User’s Manual
Chapter 4
MCU Control Function
4 – 13
4.3.3.2
STOP Mode When CPU Operates with High-Speed Clock
When the CPU is operating with a high-speed clock and the STP bit of SBYCON is set to “1” with the stop code
acceptor enabled, the STOP mode is entered and high-speed oscillation and low-speed oscillation stop.
When the NMI interrupt request or the interrupt-enabled (the interrupt enable flag is “1”) P00 to P03 interrupt request
is issued, the STP bit is set to “0” and the low-speed and high-speed oscillation restart.
When an interrupt request is issued, the STOP mode is released after the elapse of the high-speed oscillation start time
(TRC) and the high-speed clock (OSCLK) oscillation stabilization time (8192-pulse count), the mode is returned to the
program run mode, and the high-speed clocks (OSCLK and HSCLK) restart supply to the peripheral circuits.
The low-speed clock (LSCLK) restarts supply to the peripheral circuits after the elapse of the low-speed oscillation
start time (TXTL) and low-speed clock (LSCLK) oscillation settling time (8192 count).
For the high-speed oscillation start time (TRC) and low-speed oscillation start time (TXTL), see the “Electrical
Characteristics” Section in Appendix C.
Figure 4-4 shows the operation waveforms in STOP mode when CPU operates with the high-speed clock.
Figure 4-4
Operation Waveforms in STOP Mode When CPU Operates with High-Speed Clock
Note:
The STOP mode is entered two cycles after the instruction that sets the STP bit to “1” and up to two instructions are
executed during the period between STOP mode release and a transition to interrupt processing. Therefore, place two
NOP instructions next to the instruction that set the STP bit to “1”.
Low-speed oscillation
waveform
Low-speed oscillation waveform
SYSCLK
High-speed oscillation waveform
High-speed oscillation
waveform
SBYCON.STP bit
LSCLK
OSCLK and HSCLK waveforms
OSCLK, HSCLK
Program operating mode
STOP mode
Program operating mode
Interrupt request
TXTL
High-speed oscillation
8192-pulse count
HSCLK waveform
TRC
HSCLK waveform
8192-pulse count
Hiz
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