參數(shù)資料
型號： M34518M4-XXXFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP32
封裝： 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32
文件頁數(shù)： 108/157頁
文件大?。?/td> 1783K
代理商： M34518M4-XXXFP
ML610Q411/ML610Q412/ML610Q415 User’s Manual
Chapter 4
MCU Control Function
4 – 9
4.2.8
Block Control Register 4(BLKCON4)
Address: 0F02CH
Access: R/W
Access size: 8 bits
Initial value: 00H
7
6
5
4
3
2
1
0
BLKCON4
―
DLCD
DBLD
DXTSP
―
DRAD
DSAD
R/W
Initial value
0
BLKCON4 is a special function register (SFR) to make even more reducing current consumption by turning unused
peripherals off.
[Description of Bits]
DLCD (bit 6)
The DLCD bit is used to control LCD driver operation. When the DLCD bit is set to “1”, the circuits related to LCD
driver are reset and turned off.
DLCD
Description
0
Enable operating LCD driver (initial value)
1
Disable operating LCD driver
DBLD (bit 5)
The DBLD bit is used to control BLD (Battery Level Detector) operation. When the DBLD bit is set to “1”, the
circuits related to BLD are reset and turned off.
DBLD
Description
0
Enable operating BLD (initial value)
1
Disable operating BLD driver
DXTSP (bit 4)
ML610Q411/Q412: The DXTSP bit is used to control 32kHz oscillation stop detect operation. Only during HALT
mode, When the DXTSP bit is set to “1”, the circuits related to 32kHz oscillation stop detect are reset and turned off.
When the operating mode is not in HALT, the 32kHz oscillation stop detect is always working regardless the
condition of this bit.
ML610Q415: The 32kHz oscillation stop detect circuit is always disable regardless the condition of this bit.
DXTSP
Description
0
Enable operating 32kHz oscillation stop detect (initial value)
1
Disable operating 32kHz oscillation stop detect in HALT mode*
* ML610Q411PA has a different specification of that the circuits related to 32kHz oscillation stop detect are reset and
turned off (disabled) when the DXTSP bit is set to “1” regardless the CPU in HALT mode or not.
DRAD (bit 1)
The DRAD bit is used to control RC type A/D converter operation. When the DRAD bit is set to “1”, the circuits
related to RC type A/D converter are reset and turned off.
DRAD
Description
0
Enable operating RC type A/D converter (initial value)
1
Disable operating RC type A/D converter
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