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參數(shù)資料
| 型號(hào)： | M34286G2-XXXGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | 4.40 X 6.50 MM, 0.65 MM PITCH, PLASTIC, LSSOP-20 |
| 文件頁數(shù)： | 11/30頁 |
| 文件大小： | 516K |
| 代理商： | M34286G2-XXXGP |
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Rev.1.00
Aug 06, 2008
page 17 of 64
REJ03B0251-0100
4286 Group
LOGIC OPERATION FUNCTION
The 4286 Group has the 4-bit logic operation function. The logic
operation between the contents of register A and the low-order 4
bits of register E is performed and its result is stored in register A.
Each logic operation can be selected by setting logic operation
selection register LO.
Set the contents of this register through register A with the TLOA
instruction. The logic operation selected by register LO is
executed with the LGOP instruction.
Table 5 shows the logic operation selection register LO.
Table 5 Logic operation selection register LO
Note: “W” represents write enabled.
WATCHDOG TIMER
Watchdog timer provides a method to reset and restart the system
when a program runs wild. Watchdog timer consists of 14-bit
timer (WDT) and watchdog timer flags (WDF1, WDF2).
Watchdog timer downcounts the instruction clock (INSTCK) as
the count source immediately after system is released from reset.
When the timer WDT count value becomes 000016 and underflow
occurs, the WDF1 flag is set to “1.” Then, when the WRST
instruction is not executed before the timer WDT counts 16383,
WDF2 flag is set to “1” and internal reset signal is generated and
system reset is performed.
Execute the WRST instruction at period of 16383 machine cycle
or less to keep the microcomputer operation normal.
Timer WDT is also used for generation of oscillation stabilization
time. When system is returned from reset and from RAM back-
up mode by key-input, software starts after the stabilization
oscillation time until timer WDT downcounts to 3E0016 elapses.
Fig. 18 Watchdog timer function
Value of timer WDT
WDF2 flag
WRST
instruction
execution
System
reset
Return
3E0016
0000 16
WDF1 flag
3FFF16
System
reset
Software start
POF
instruction
execution
Internal reset signal
“1”
“0”
“1”
“0”
“H”
“L”
at reset : 002
at RAM back-up : 002
W
LO1
0
1
LO0
0
1
0
1
LO1
LO0
Logic operation selection bits
Logic operation selection register LO
Logic operation function
Exclusive logic OR operation (XOR)
OR operation (OR)
AND operation (AND)
Not available
Watchdog timer
Be sure that the timing to execute the WRST instruction in
order to operate WDT efficiently.
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| M34286G2GP | 4-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO20 |
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