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參數(shù)資料
| 型號(hào)： | M34282M2-XXXGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 1 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | 0.225 INCH, 0.65 MM PITCH, PLASTIC, SSOP-20 |
| 文件頁數(shù)： | 61/71頁 |
| 文件大?。?/td> | 547K |
| 代理商： | M34282M2-XXXGP |
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Rev.1.33
Mar 18, 2004
page 62 of 67
4282 Group
Number of transfer
In the first transfer, the command code is input. Then, address
input or data input/output is performed according to the
contents of the command code. Table 11 shows the software
command used in the PROM mode. The following explains
each software command.
(2) Functional outline
In the PROM mode, data is transferred with the clock-
synchronous serial input/output. The input data is read through
the SDA pin into the internal circuit synchronously with the
rising edge of the serial clock pulse. The output data is output
from the SDA pin synchronously with the falling edge of the
serial clock pulse. Data is transferred in units of 8 bits.
Table 11 Software command
Command
Read
Program
Program verify
First command
code input
1516
2516
3516
Second
Read address L (input)
Program address L (input)
Fourth
Read data L (output)
Program data L (input)
Third
Read address H (input)
Program address H (input)
Number of transfer
Command
Read
Program
Program verify
Fifth
Read data H (output)
Program data H (input)
Seventh
Verify data H (output)
Sixth
Verify data L (output)
(3) Read
Input the command code 1516 in the first transfer. Proceed
and input the low-order 8 bits and the high-order 8 bits of the
address and pull the PGM pin to “L.” When this is done, the
contents of input address is read and stored into the internal
data latch.
When the PGM pin is released back to “H” and serial clock is
input to the SCLK pin, the low-order 8 bits and high-order 8
bits of read data which have been stored into the data latch,
are serially output from the SDA pin.
Note: When outputting the read data, the SDA pin is switched for output at the first falling of the serial clock. The SDA pin is
placed in the high-impedance state during the th(C–E) period after the last rising edge of the serial clock (at the 16th bit).
Fig. 31 Timing at reading
tCR
tRC
1 010 1 0 00
A0
A7
Command code input (1516)
Read address input (L)
Read address input (H)
SCLK
SDA
PGM
Read
tWR
tCH
D0
D7
Read data output (L)
tCH
D8
Read data output (H)
tCH
0000 000
A8A9
00 00 0
A10
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M34282T5-OPT | 制造商:Renesas Electronics Corporation 功能描述:DEV OPTION BOARD FOR 4282 GROUP/PC4400 - Boxed Product (Development Kits) |
| M34283 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34283G2GP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34283G2GP#U1 | 制造商:Renesas Electronics Corporation 功能描述:MICROCONTROLLER |
| M34283G2-XXXGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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