參數(shù)資料
型號(hào)： M30102M3-XXXFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP48
封裝： 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù)： 78/166頁
文件大?。?/td> 2060K
代理商： M30102M3-XXXFP
Under
development
Tentative Specifications REV.E1
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30100/M30102 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
SFR
16
000016
000116
000216
000316
000416
000516
000616
000716
000816
000916
000A16
000B16
000C16
000D16
000E16
000F16
001016
001116
001216
001316
001416
001516
001616
001716
001816
001916
001A16
001B16
001C16
001D16
001E16
001F16
002016
002116
002216
002316
002416
002516
002616
002716
002816
002916
002A16
002B16
002C16
002D16
002E16
002F16
003016
003116
003216
003316
003416
003516
003616
003716
003816
003916
003A16
003B16
003C16
003D16
003E16
003F16
004016
004116
004216
004316
004416
004516
004616
004716
004816
004916
004A16
004B16
004C16
004D16
004E16
004F16
005016
005116
005216
005316
005416
005516
005616
005716
005816
005916
005A16
005B16
005C16
005D16
005E16
005F16
Watchdog timer start register (WDTS)
Watchdog timer control register (WDC)
Processor mode register 0 (PM0)
Address match interrupt register 0 (RMAD0)
Address match interrupt register 1 (RMAD1)
System clock control register 0 (CM0)
System clock control register 1 (CM1)
Address match interrupt enable register (AIER)
Protect register (PRCR)
Processor mode register 1(PM1)
Timer X interrupt control register (TXIC)
UART0 transmit interrupt control register (S0TIC)
Timer 1 interrupt control register (T1IC)
Timer Y interrupt control register (TYIC)
UART0 receive interrupt control register (S0RIC)
UART1 transmit interrupt control register (S1TIC)
UART1 receive interrupt control register (S1RIC)
Key input interrupt control register (KUPIC)
A-D conversion interrupt control register (ADIC)
INT1 interrupt control register (INT1IC)
TCIN interrupt control register (TCINIC)
Timer Z interrupt control register (TZIC)
INT0 interrupt control register (INT0IC)
Timer C interrupt control register (TCIC)
Oscillation stop detection register (CM2)
INT0 input filter select register (INT0F)
INT3 interrupt control register (INT3IC)
INT2 interrupt control register (INT2IC)
CNTR0 interrupt control register (CNTR0IC)
Figure 1.6.1. Location of peripheral unit control registers (1)
Note: The blank area is reserved and must not be read or written.
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