參數(shù)資料
型號: M2V64S2DTP-8
廠商: Mitsubishi Electric Corporation
英文描述: 64M Synchronous DRAM
中文描述: 6400同步DRAM
文件頁數(shù): 29/51頁
文件大?。?/td> 430K
代理商: M2V64S2DTP-8
Feb.'00
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
SDRAM (Rev.3.2)
64M Synchronous DRAM
M2V64S20DTP-6,-6L,-7,-7L,-8,-8L
M2V64S30DTP-6,-6L,-7,-7L,-8,-8L
M2V64S40DTP-6,-6L,-7,-7L,-8,-8L
(4-BANK x 4,194,304-WORD x 4-BIT)
(4-BANK x 2,097,152-WORD x 8-BIT)
(4-BANK x 1,048,576-WORD x 16-BIT)
29
CLK SUSPEND and POWER DOWN
CKE controls the internal CLK at the following cycle. Figure below shows how CKE works. By
negating CKE, the next internal CLK is suspended. The purpose of CLK suspend is power down, output
suspend or input suspend. CKE is a synchronous input except during the self-refresh mode. CLK
suspend can be performed either when the banks are active or idle. A command at the suspended cycle is
ignored.
Power Down by CKE
CLK
Command
CKE
Command
CKE
Standby Power Down
Active Power Down
PRE
NOP
NOP
NOP
NOP
NOP
NOP
ACT
DQ Suspend by CKE
CLK
Command
DQ
CKE
Write
Read
D0
D1
D2
D3
Q0
Q1
Q2
Q3
ext.CLK
CKE
int.CLK
tIH
tIS
tIH
tIS
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