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參數(shù)資料
| 型號： | M14C64 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Memory Card IC 64/32 Kbit Serial IC Bus EEPROM |
| 中文描述： | 記憶卡IC 64/32千位串行IC總線的EEPROM |
| 文件頁數(shù)： | 6/14頁 |
| 文件大?。?/td> | 126K |
| 代理商： | M14C64 |
M14C64, M14C32
6/14
Figure 7. Write Mode Sequences with WC=0
S
S
BYTE WRITE
DEV SEL
BYTE ADDR
BYTE ADDR
DATA IN
WC
S
PAGE WRITE
DEV SEL
BYTE ADDR
BYTE ADDR
DATA IN 1
WC
DATA IN 2
AI01106B
PAGE WRITE
(cont'd)
WC (cont'd)
S
DATA IN N
ACK
R/W
ACK
ACK
ACK
ACK
ACK
ACK
ACK
R/W
ACK
ACK
Table 6. Operating Modes
Note: 1. X =
V
IH
or V
IL
.
Mode
RW bit
WC
1
Bytes
Initial Sequence
Current Address Read
‘1’
X
1
START, Device Select, RW = ‘1’
Random Address Read
‘0’
X
START, Device Select, RW = ‘0’, Address
‘1’
X
1
reSTART, Device Select, RW = ‘1’
Sequential Read
‘1’
X
≥
1
Similar to Current or Random Mode
Byte Write
‘0’
V
IL
1
START, Device Select, RW = ‘0’
Page Write
‘0’
V
IL
≤
32
START, Device Select, RW = ‘0’
Page Write
The Page Write mode allows up to 32 bytes to be
written in a single write cycle, provided that they
are all located in the same ’row’ in the memory:
that is the most significant memory address bits
(b13-b5 for the M14C64 and b12-b5 for the
M14C32) are the same. The master sends from
one up to 32 bytes of data, each of which is ac-
knowledged by the memory if the WC pin is low. If
the WC pin is high, each data byte is followed by a
NoACK and the location is not modified. After each
byte is transferred, the internal byte address coun-
ter (the five least significant bits only) is increment-
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