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參數(shù)資料
| 型號(hào)： | LTC6990IS6#TRPBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | XO, clock |
| 英文描述： | VCO, 0.000488 MHz - 2 MHz |
| 封裝： | LEAD FREE, PLASTIC, TSOT-23, 6 PIN |
| 文件頁數(shù)： | 11/28頁 |
| 文件大?。?/td> | 310K |
| 代理商： | LTC6990IS6#TRPBF |
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LTC6990
19
6990f
Figure 14. Digitally Controlled Oscillator with VSET Variation Eliminated
6990 F14
LTC6990
OE
GND
SET
OUT
V+
DIV
C1
0.1μF
R1
R2
RSET
V+
RVCO
–
+
V+
1/2
LTC6078
LTC1659
V+
VCC
REF
GND
VOUT
μP
DIN
CLK
CS/LD
fOUT
1MHz 50k
NDIV RVCO
1
RVCO
RSET
DIN
4096
DIN = 0 to 4095
Eliminating VSET Error Effects with DAC Frequency
Control
Many DACs allow for the use of an external reference.
If such a DAC is used to provide the VCTRL voltage, the
VSET error is eliminated by buffering VSET and using it as
the DAC’s reference voltage, as shown in Figure 14. The
DAC’s output voltage now tracks any VSET variation and
eliminates it as an error source. The SET pin cannot be
tied directly to the reference input of the DAC because
the current drawn by the DAC’s REF input would affect
the frequency.
ISET Extremes (Master Oscillator Frequency Extremes)
Pushing ISET outside of the recommended 1.25μA to 20μA
range forces the master oscillator to operate outside of
the 62.5kHz to 1MHz range in which it is most accurate.
APPLICATIONS INFORMATION
The oscillator will still function with reduced accuracy
in its extended range (see the Electrical Characteristics
section).
The LTC6990 is designed to function normally for ISET
as low as 1.25μA. At approximately 500nA, the oscillator
output will be frozen in its current state. For NDIV = 1 or 2,
OUT will halt in a low state. But for larger divider ratios,
it could halt in a high or low state. This avoids introduc-
ing short pulses while modulating a very low frequency
output. Note that the output will not be
disabled as when
OE is low (e.g. the output will not enter a high impedance
state if Hi-Z = 1).
At the other extreme, the master oscillator frequency can
reach 2MHz for ISET = 40μA (RSET = 25k). It is not recom-
mended to operate the master oscillator beyond 2MHz
because the accuracy of the DIV pin ADC will suffer.
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