參數(shù)資料
型號(hào): LTC4251IS6
廠商: LINEAR TECHNOLOGY CORP
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6
封裝: 1 MM HEIGHT, PLASTIC, MO-193, TSOT-23, 6 PIN
文件頁(yè)數(shù): 20/20頁(yè)
文件大?。?/td> 235K
代理商: LTC4251IS6
LTC4251/LTC4251-1/
LTC4251-2
9
425112fa
OPERATIO
U
Figure 1. Basic LTC4251 Hot Swap Topology
Figure 2. –48V, 2.5A Hot Swap Controller
425112 F01
LTC4251
CLOAD
ISOLATED
DC/DC
CONVERTER
MODULE
LOW
VOLTAGE
CIRCUITRY
++
––
PLUG-IN BOARD
BACKPLANE
–48RTN
–48V
+
4
3
2
1
425112 F02
–48RTN
–48V
UV/OV
TIMER
VEE
VIN
SENSE
GATE
LTC4251
R1
402k
1%
R2
32.4k
1%
CT
150nF
CC
18nF
RS
20m
Q1
IRF530S
RC
10
RIN
10k
500mW
C1
10nF
CIN
1
F
CL
100
F
TYP
LONG
SHORT
+
Interlock Conditions
A start-up sequence commences once five initial “inter-
lock” conditions are met:
1. The input voltage VIN exceeds 9.2V (VLKO)
2. The voltage at UV/OV falls within the range of VUVHI to
VOVLO (UV > VUVHI, LTC4251-2)
3. The (SENSE – VEE) voltage is <50mV (VCB)
4. The voltage on the timer capacitor (CT) is less than 1V
(VTMRL)
5. GATE is less than 0.5V (VGATEL)
The first two conditions are continuously monitored and
the latter three are checked prior to initial timing or GATE
ramp-up. Upon exiting an OV condition, the TIMER pin
voltage requirement is inhibited. Details are described in
the Applications Information, Timing Waveforms section.
TIMER begins the start-up sequence by sourcing 5.8
A
into CT. If VIN or UV/OV falls out of range, the start-up cycle
stops and TIMER discharges CT to less than 1V, then waits
until the aforementioned conditions are once again met. If
CT successfully charges to 4V, TIMER pulls low and GATE
is released. GATE sources 58
A (IGATE), charging the
MOSFET gate and associated capacitance.
Two modes of operation are possible during the time the
MOSFET is first turning on, depending on the values of
external components, MOSFET characteristics and nomi-
nal design current. One possibility is that the MOSFET will
turn on gradually so that the inrush into the load capaci-
tance remains a low value. The output will simply ramp to
–48V and the MOSFET will be fully enhanced. A second
possibility is that the load current exceeds the current limit
threshold of 100mV/RS. In this case, the LTC4251/
LTC4251-1/LTC4251-2 will ramp the output by sourcing
100mV/RS current into the load capacitance. It is impor-
tant to set the timer delay so that, regardless of which
start-up mode is used, the start-up time is less than the
TIMER delay time. If this condition is not met, the LTC4251/
LTC4251-1/LTC4251-2 may shut down after one TIMER
delay.
Board Removal
If the board is withdrawn from the card cage, the UV/OV
divider is the first to lose connection. This shuts off the
MOSFET and commutates the flow of current in the
connector. When the power pins subsequently separate,
there is no arcing.
Current Control
Three levels of protection handle short-circuit and over-
load conditions. Load current is monitored by SENSE and
resistor RS. There are three distinct thresholds at SENSE:
50mV for a timed circuit breaker function; 100mV for an
analog current limit loop; and 200mV for a fast, feedforward
comparator which limits peak current in the event of a
catastrophic short-circuit.
If, owing to an output overload, the voltage drop across RS
exceeds 50mV, TIMER sources 230
A into CT. CT eventu-
ally charges to a 4V threshold and the LTC4251/LTC4251-1/
LTC4251-2 latch off. If the overload goes away and SENSE
measures less than 50mV, CT slowly discharges (5.8A).
In this way the circuit breaker function will also respond to
low duty cycle overloads, and accounts for fast heating
and slow cooling characteristic of the MOSFET.
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