參數(shù)資料
型號(hào)： LSM330DL
廠商： STMICROELECTRONICS
元件分類： 模擬信號(hào)調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PBGA28
封裝： 7.50 X 4.40 MM, 1.10 MM HEIGHT, GREEN, PLASTIC, LGA-28
文件頁(yè)數(shù)： 4/54頁(yè)
文件大小： 1064K
代理商： LSM330DL
Module specifications
LSM330DL
12/54
Doc ID 022018 Rev 1
2
Module specifications
2.1
Mechanical characteristics
The values given in the following table are for the conditions Vdd = 3 V, T = 25 °C unless
otherwise noted.(a)
a.
The product is factory calibrated at 3 V. The operational power supply range is from 2.4 V to 3.6 V.
Table 3.
Mechanical characteristics
Symbol
Parameter
Test conditions
Min. Typ.(1) Max.
Unit
LA_FS
Linear acceleration
measurement range(2)
FS bit set to 00
±2
g
FS bit set to 01
±4
FS bit set to 10
±8
FS bit set to 11
±16
G_FS
Angular rate measurement range(2)
FS bit set to 00
±250
dps
FS bit set to 01
±500
FS bit set to 10
±2000
LA_So
Linear acceleration sensitivity
FS bit set to 00
1
m
g/digit
FS bit set to 01
2
FS bit set to 10
4
FS bit set to 11
12
G_So
Angular rate sensitivity
FS bit set to 00
8.75
mdps/
digit
FS bit set to 01
17.5
FS bit set to 10
70
LA_So
Linear acceleration
Sensitivity change vs. temperature
FS bit set to 00
±0.05
%/°C
G_So
Angular rate sensitivity change vs. temp. from -40 to +85°C
±2
%
LA_TyOff
Typical zero-
g level offset accuracy(3)
FS bit set to 00
±60
m
g
G_TyOff
Typical zero-rate level(4)
FS bit set to 00
10
LSb
LA_TCOff Zero-
g level change vs. temperature
Max delta from 25 °C
±0.5
m
g/°C
G_TCOff
Zero-rate level change vs. temperature
FS bit set to 00
from -40 to +85°C
±0.03
dps/°C
An
Acceleration noise density
FS bit set to 00, normal
mode, ODR bit set to 1001
220
g/
Rn
Rate noise density
FS bit set to 00, BW = 50 Hz
0.03
dps/
Top
Operating temperature range
-40
+85
°C
1.
Typical specifications are not guaranteed.
2.
Verified by wafer level test and measurement of initial offset and sensitivity.
3.
Typical zero-
g level offset value after MSL3 preconditioning.
4.
Offset can be eliminated by enabling the built-in high-pass filter.
Hz
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