參數(shù)資料
型號(hào): LP5551SQX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 模擬信號(hào)調(diào)理
英文描述: PowerWise⑩ Technology Compliant Energy Management Unit
中文描述: SPECIALTY ANALOG CIRCUIT, QCC36
封裝: LLP-36
文件頁數(shù): 16/32頁
文件大?。?/td> 3081K
代理商: LP5551SQX
Switching Waveforms
PWM
20172120
Switching Waveforms
PFM
20172121
LP5551 PWI Register Map
The PWI standard supports sixteen 8-bit registers on the PWI slave. The table below summarizes these registers and shows default
register bit values after reset. The following sub-sections provide additional detail on the use of each individual register.
Summary
Register
Address
Register
Name
Register Usage
Type
Reset Default Value
7
6
0
1
-
-
0
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
-
-
-
-
0
1
0
0
-
-
-
-
5
1
-
1
0
0
0
0
1
1
-
-
1
1
0
-
-
4
1
-
0
0
0
0
0
1
0
-
-
1
1
0
-
-
3
1
-
0
1
0
0
0
1
1
-
-
1
1
0
-
-
2
1
-
-
1
0
0
0
-
-
-
-
1
-
0
-
-
1
1
-
-
1
0
-
-
-
-
-
-
1
-
0
-
-
0
1
-
-
1
1
-
-
-
-
-
-
1
-
0
-
-
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
0xA
0xB
0xC
0xD
0xE
0xF
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
Core voltage
Unused
Memory retention voltage
Status register
PWI version number
N-well Bias
P-well Bias
LDO2 voltage
LDO1 voltage
PFM/PWM force
SW_DVS voltage
Enable Control
LDO 4 voltage
GPO Control
Reserved
Reserved
R/W
R/W
R/W
R/O
R/O
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R0 - Core Voltage Register
Address 0x0
Type R/W
Reset Default 8h’7F
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