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Pin Descriptions
Pin #
Name
I/O
Type
Description
1
PWR_ON
I
D
This is an active HI push button input which can be used to signal PWR_ON
and PWR_OFF events to the CPU by controlling the ext_wakeup [pin4] and
select contents of register 8H'88
2
nTEST_JIG
I
D
This is an active LOW input signal used for detecting an external HW event.
The response is seen in the ext_wakeup [pin4] and select contents of register
8H'88
3
SPARE
I
D
This is an input signal used for detecting a external HW event. The response
is seen in the ext_wakeup [pin4] and select contents of register 8H'88. The
polarity on this pin is assignable
4
EXT_WAKEUP
O
D
This pin generates a single 10 mS pulse output to CPU in response to input
from pin[s] 1, 2, and 3. Flags CPU to interrogate register 8H'88
5
FB1
I
A
Buck1 input feedback terminal
6
V
IN
I
PWR
Battery Input (Internal circuitry and LDO1-3 power input)
7
V
OUT LDO1
O
PWR
LDO1 output
8
V
OUT LDO2
O
PWR
LDO2 output
9
nRSTI
I
D
Active low Reset pin. Signal used to reset the IC (by default is pulled high
internally). Typically a push button reset.
10
GND1
G
Ground
11
VREF
O
A
Bypass Cap. for the high internal impedance reference.
12
V
OUT LDO3
O
PWR
LDO3 output
13
V
OUT LDO4
O
PWR
LDO4 output
14
V
IN LDO4
I
PWR
Power input to LDO4, this can be connected to either from a 1.8V supply to
main Battery supply.
15
V
IN BUBATT
I
PWR
Back Up Battery input supply.
16
V
OUT LDO_RTC
O
PWR
LDO_RTC output supply to the RTC of the application processor.
17
nBATT_FLT
O
D
Main Battery fault output, indicates the main battery is low
(discharged) or the dc source has been removed from the system. This gives
the processor an indicator that the power will shut down. During this time the
processor will operate from the back up coin cell.
18
PGND2
G
Buck2 NMOS Power Ground
19
SW2
O
PWR
Buck2 switcher output
20
V
IN Buck2
I
PWR
Battery input power to Buck2
21
SDA
I/O
D
I2C Data (Bidirectional)
22
SCL
I
D
I2C Clock
23
FB2
I
A
Buck2 input feedback terminal
24
nRSTO
O
D
Reset output from the PMIC to the processor
25
V
OUT LDO5
O
PWR
LDO5 output
26
V
IN LDO5
I
PWR
Power input to LDO5, this can be connected to V
IN or to a separate 1.8V
supply.
27
VDDA
I
PWR
Analog Power for VREF, BIAS
28
FB3
I
A
Buck3 Feedback
29
GPIO1 /
nCHG_EN
I/O
D
General Purpose I/O / Ext. backup battery charger enable pin. This pin
enables the main battery / DC source power to charge the backup battery.
This pin toggled via the application processor. By grounding this pin the DC
source continuously charges the backup battery
30
GPIO2
I/O
D
General Purpose I/O
31
V
IN Buck3
I
PWR
Battery input power to Buck3
32
SW3
PWR
Buck3 switcher output
33
PGND3
G
Buck3 NMOS Power Ground
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6
LP3972