參數(shù)資料
型號(hào)： LP2975AIMMX-3.3/NOPB
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類(lèi)： 模擬信號(hào)調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PDSO8
封裝： MINI, SOP-8
文件頁(yè)數(shù)： 6/20頁(yè)
文件大?。?/td> 1135K
代理商： LP2975AIMMX-3.3/NOPB
Application Hints (Continued)
The ESR of the output capacitor is very important for stabil-
ity, as it creates a zero (f
z) which cancels much of the phase
shift resulting from one of the poles present in the loop. The
frequency of the zero is calculated from:
f
z = 0.16 / (ESR x COUT)
For best results in most designs, the frequency of f
z should
fall between 5 kHz and 50 kHz. It must be noted that the
values of C
OUT and ESR usually vary with temperature
(severely in the case of aluminum electrolytics), and this
must be taken into consideration.
For the design example (V
OUT =5V @ 1A), select a capacitor
which meets the f
z requirements. Solving the equation for
ESR yields:
ESR = 0.16 / (f
z xCOUT)
Assuming f
z = 5 kHz and 50 kHz, the limiting values of ESR
for the 180 F capacitor are found to be:
18 m
≤ ESR ≤ 0.18
A good-quality, low-ESR capacitor type such as the Pana-
sonic HFQ is a good choice. However, the 10V/180 F
capacitor (#ECA-1AFQ181) has an ESR of 0.3
which is not
in the desired range.
To assure a stable design, some of the options are:
1) Use a different type capacitor which has a lower ESR
such as an organic-electrolyte OSCON.
2) Use a higher voltage capacitor. Since ESR is inversely
proportional to the physical size of the capacitor, a higher
voltage capacitor with the same C value will typically have a
lower ESR (because of the larger case size). In this ex-
ample, a Panasonic ECA-1EFQ181 (which is a 180 F/25V
part) has an ESR of 0.17
and would meet the desired ESR
range.
3) Use a feed-forward capacitor (see next section).
Feed-Forward Capacitor
Although not required in every application, the use of a
feed-forward capacitor (C
F) can yield improvements in both
phase margin and transient response in most designs.
The added phase margin provided by C
F can prevent oscil-
lations in cases where the required value of C
OUT and ESR
can not be easily obtained (see previous section).
C
F can also reduce the phase shift due to the pole resulting
from the Gate capacitance, stabilizing applications where
this pole occurs at a low frequency (before cross-over) which
would cause oscillations if left uncompensated (see later
section GATE CAPACITANCE POLE FREQUENCY).
Even in a stable design, adding C
F will typically provide more
optimal loop response (faster settling time). For these rea-
sons, the use of a feed-forward capacitor is always rec-
ommended.
C
F is connected across the top resistor in the divider used to
set the output voltage (see Typical Application Circuit). This
forms a zero in the loop response (defined as f
zf), whose
frequency is:
f
zf =6.6x10
6 /[C
F x(VOUT /1.241)]
When solved for C
F, the fzf equation is:
C
F =6.6x10
6 /[f
zf x(VOUT /1.241)]
For most applications, f
zf should be set between 5 kHz and
50 kHz.
ADJUSTING THE OUTPUT VOLTAGE
If an output voltage is required which is not available as a
standard voltage, the LP2975 can be used as an adjustable
regulator (see Typical Application circuit). The external resis-
tors R1 and R2 (along with the internal 24 k
resistor) set
the output voltage.
It is important to note that R2 is connected in parallel with the
internal 24 k
resistor. If we define R
EQ as the total resis-
tance between the COMP pin and ground, then its value
will be the parallel combination of R2 and 24 k
:
R
EQ = (R2 x 24k) / (R2 + 24k)
It follows that the output voltage will be:
V
OUT =1.24[(R1/REQ)+1]
Some important considerations for an adjustable design:
The tolerance of the internal 24 k
resistor is about ±20%.
Also, its temperature coefficient is almost certainly different
than the TC of the external resistor that is used for R2.
For these reasons, it is recommended that R2 be set at a
value that is not greater than 1.2k. In this way, the value of
R2 will dominate R
EQ, and the tolerance and TC of the
internal 24k resistor will have a negligible effect on output
voltage accuracy.
To determine the value for R1:
R1=R
EQ [(VOUT / 1.24) 1]
External Capacitors (Adjustable Application)
All information in the previous section EXTERNAL CAPACI-
TORS applies to the adjustable application with the excep-
tion of how to select the value of the feed-forward capacitor.
The feed-forward capacitor C
C in the adjustable application
(see Typical Application Circuit) performs exactly the same
function as described in the previous section FEEDFOR-
WARD CAPACITOR. However, because R1 is user-
selected, a different formula must be used to determine the
value of C
C:
C
C =1/(2
π xR1xf
zf)
As stated previously, the optimal frequency at which to place
the zero f
zf is usually between 5 kHz and 50 kHz.
OPTIMIZING DESIGN STABILITY
Because the LP2975 can be used with a variety of different
applications, there is no single set of components that are
best suited to every design. This section provides informa-
tion which will enable the designer to select components that
optimize stability (phase margin) for a specific application.
Gate Capacitance
An important consideration of a design is to identify the
frequency of the pole which results from the capacitance of
the Gate of the FET (this pole will be referred to as f
pg). As
f
pg gets closer to the loop crossover frequency, the phase
margin is reduced. Information will now be provided to allow
the total Gate capacitance to be calculated so that f
pg can be
approximated.
The first step in calculating fp is to determine how much
effective Gate capacitance (C
EFF) is present. The formula
for calculating C
EFF is:
C
EFF =CGS +CGD [1+Gm (RL / / ESR) ]
Where:
C
GS is the Gate-to-Source capacitance, which is found
from the values (refer to FET data sheet for values of C
ISS
and C
RSS):
LP2975
www.national.com
14
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