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參數(shù)資料
| 型號(hào)： | LP2975AIMMX-3.3/NOPB |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO8 |
| 封裝： | MINI, SOP-8 |
| 文件頁(yè)數(shù)： | 3/20頁(yè) |
| 文件大小： | 1135K |
| 代理商： | LP2975AIMMX-3.3/NOPB |
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Reference Designs (Continued)
DESIGN #3: V
OUT = 1.5V @ 6A.
(Refer to Typical
Application Circuits, Adjustable Voltage Regulator)
Components
C
IN = 1000 F Aluminum Electrolytic
C
OUT = 4 X 330 F OSCON Aluminum Electrolytic
C
C = NOT USED
R1 = 261
,1%
R2 = 1.21 k
,1%
R
SC =6m
P-FET = NDP6020P
Heatsink: (Assuming V
IN
≤ 3.3V and T
A
≤ 60C) if protection
against a continuous short-circuit is required, a heatsink with
θ
S-A
< 2.5 C/W must be used. However, if continuous
short-circuit survivability is not needed, a heatsink with
θ
S-A
< 7 C/W is adequate.
Performance Data
Dropout Voltage
Dropout voltage is defined as the minimum input-to-output
differential voltage required by the regulator to keep the
output in regulation. It is measured by reducing V
IN until the
output voltage drops below the nominal value (the nominal
value is the output voltage measured with V
IN = 3.3V). IL =
6A for this test.
DROPOUT VOLTAGE = 0.68V
Load Regulation
Load regulation is defined as the maximum change in output
voltage as the load current is varied. It is measured by
changing the load resistance and recording the minimum/
maximum output voltage. The measured change in output
voltage is divided by the nominal output voltage and ex-
pressed as a percentage. V
IN = 3.3V for this test.
0
≤ I
L
≤ 6A: LOAD REGULATION = 0.092%
Line Regulation
Line regulation is defined as the maximum change in output
voltage as the input voltage is varied. It is measured by
changing the input voltage and recording the minimum/
maximum output voltage. The measured change in output
voltage is divided by the nominal output voltage and ex-
pressed as a percentage. I
L = 6A for this test.
3.3V
≤ V
IN
≤ 5V: LINE REGULATION = 0.033%
Output Noise Voltage
Output noise voltage was measured by connecting a wide-
band AC voltmeter (HP 400E) directly across the output
capacitor. V
IN = 3.3V and IL = 6A for this test.
NOISE = 60 V (rms)
Transient Response
Transient response is defined as the change in output volt-
age which occurs after the load current is suddenly changed.
V
IN = 3.3V for this test.
The load resistor is connected to the regulator output using a
switch so that the load current increases from 0 to 6A
abruptly. The change in output voltage is shown in the scope
photo (the vertical scale is 50 mV/division and the horizontal
scale is 20 s/division. The regulator nominal output (1.5V)
is located on the center line of the photo. A maximum change
of about 80 mV is shown.
10003441
Transient Response for 0–6A Load Step
Application Hints
SELECTING THE FET
The best choice of FET for a specific application will depend
on a number of factors:
VOLTAGE RATING: The FET must have a Drain-to-Source
breakdown voltage (sometimes called BV
DSS)
which is
greater than the input voltage.
DRAIN CURRENT: On-state Drain current must be specified
to be greater than the worst-case (short circuit) load current
for the application.
TURN-ON THRESHOLD: The Gate-to-Source voltage
where the FET turns on (called the Gate Threshold Voltage)
is very important. Many FET’s are intended for use with
G-to-S voltages in the 5V to 10V range. These should only
be used in applications where the input voltage is high
enough to provide >5V of drive to the Gate.
Newer FET’s are becoming available with lower turn-on
thresholds (Logic-Level FET’s) which turn on fully with a gate
voltage of only 3V to 4V. Low threshold FET’s should be
used in applications where the input voltage is
≤ 5V.
ON RESISTANCE: FET on resistance (often called R
DSON)
is a critical parameter since it directly determines the mini-
mum input-to-output voltage required for operation at a given
load current (also called dropout voltage).
R
DSON
is highly dependent on the amount of Gate-to-
Source voltage applied. For example, the R
DSON of a FET
with V
G-S = 5V will typically decrease by about 25% as the
V
G-S is increased to 10V. RDSON is also temperature depen-
dent, increasing at higher temperatures.
The dropout voltage of any LDO design is directly related to
R
DSON, as given by:
V
DROPOUT =ILOAD x(RDSON+RSC)
Where R
SC is the short-circuit current limit set resistor (see
Application Circuit).
GATE CAPACITANCE: Selecting a FET with the lowest
possible Gate capacitance improves LDO performance in
two ways:
LP2975
www.national.com
11
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