參數(shù)資料
型號(hào): LM4935
廠商: National Semiconductor Corporation
元件分類(lèi): ADC
英文描述: Audio Sub-System with Dual-Mode Stereo Headphone and Mono High Efficiency Loudspeaker Amplifiers and Multi-Purpose ADC
中文描述: 音頻子系統(tǒng)的雙模單聲道立體聲耳機(jī)和揚(yáng)聲器放大器的高效率和多功能模數(shù)轉(zhuǎn)換器
文件頁(yè)數(shù): 54/112頁(yè)
文件大?。?/td> 5017K
代理商: LM4935
12.0 Status & Control Registers
(Continued)
12.31 AUDIO INTERFACE CONFIGURATION REGISTER
This register is used to control the configuration of the audio data interfaces.
TABLE 31. AUDIO_IF (0x19h)
Bits
1:0
Field
Description
AUDIO_IF_MODE
Selects the function of the 6 audio interface IOs.
AUDIO_IF_MODE
CLK pin
00
2
I2S_
I2S_
WS pin
I
2
S
WS
PCM
SYNC
PCM
SYNC
I
2
S
WS
I2S_
SDI pin
I
2
S
SDI
-
I2S_
SDO pin
I
2
S
SDO
PCM
SDO
PCM
SDO
PCM
SDO
GPIO_1
pin
GPIO
1
GPIO
1
GPIO
1
PCM
CLK
GPIO_2
pin
GPIO
2
GPIO
2
GPIO
2
PCM
SYNC
I
2
S
CLK
PCM
CLK
PCM
CLK
I
2
S
CLK
01
2
10
2
PCM
SDI
I
2
S
SDI
11
2
2
3
4
5
I2S_WS_MS
I2S_CLK_MS
PCM_SYNC_MS
PCM_CLK_MS
I2S_SDO_DATA
If set the I
2
S_WS is produced by the LM4935 and the I
2
S_WS pin will be an output.
If set the I
2
S_CLK is produced by the LM4935 and the I
2
S_CLK pin will be an output.
If set the PCM_SYNC is produced by the LM4935 and the relevant pin will be an output.
If set the PCM_CLK is produced by the LM4935 and the relevant pin will be an output.
The two ADCs on the LM4935 can both be read via the isochronous I2S interface. The most recent
valid sample is output from the following source: (Please refer to the GPIO configuration register
(0x1Ah) for more information on SAR_CH_SEL)
I2S_SDO_DATA
00
2
01
2
10
2
11
2
7:6
LEFT
RIGHT
AUDIO ADC
SAR VSAR 1
SAR VSAR 2
A_V
DD
/2
SAR_CH_SEL
SAR_CH_SEL
SAR_CH_SEL
SAR_CH_SEL
L
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