參數(shù)資料
型號(hào): LM4935
廠商: National Semiconductor Corporation
元件分類: ADC
英文描述: Audio Sub-System with Dual-Mode Stereo Headphone and Mono High Efficiency Loudspeaker Amplifiers and Multi-Purpose ADC
中文描述: 音頻子系統(tǒng)的雙模單聲道立體聲耳機(jī)和揚(yáng)聲器放大器的高效率和多功能模數(shù)轉(zhuǎn)換器
文件頁數(shù): 32/112頁
文件大?。?/td> 5017K
代理商: LM4935
12.0 Status & Control Registers
(Continued)
12.11 ADC_2 CONFIGURATION REGISTER
This register is used to control the LM4935’s audio ADC.
TABLE 12. ADC_2 (0x07h)
Bits
0
Field
Description
ULAW/ALAW
If COMPAND is set then the data across the PCM interface to the DAC and from the ADC is
companded as follows:
ULAW/ALAW
0
1
If set the 16 bit PCM data from the ADC is companded before the PCM interface and the PCM
data to the DAC is treated as companded data.
If set the analog inputs to the ADC are muted.
This sets the frame time to be used by the AGC algorithm. In a given frame, the AGC’s peak
detector determines the peak value of the incoming microphone audio signal and compares this
value to the target value of the AGC defined by AGC_TARGET (bits [3:1] of register (0x08h)) in
order to adjust the microphone preamplifiers gain accordingly. AGC_FRAME_TIME basically sets
the sample rate of the AGC to adjust for a wide variety of speech patterns. (Note 15)
AGC_FRAME_TIME
000
2
001
2
010
2
011
2
100
2
101
2
110
2
111
2
If set the DAC clock system is enabled to drive the I2S in master mode. The Point B frequency
should be double that at Point C. This bit should be set when using the I2S interface in master
mode to read SAR information whenever both the audio ADC and DAC are inactive.
If set the PCM and I2S interfaces are 16 bits per word in master mode. The 2 last clock cycles per
word are 25% shorter to allow generation.
Commanding Type
μ-law
A-law
1
COMPAND
2
ADC_MUTE
AGC_FRAME_TIME
5:3
Time (ms)
96
128
192
256
384
512
768
1000
6
ADC_I2S_M
7
AUDIO_IF_2_16BIT
Note 15:
Refer to the
AGC overview
for further detail.
L
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