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參數(shù)資料
| 型號： | LM12L454CIV |
| 英文描述： | IC-SM-12 BIT DAS |
| 中文描述： | 集成電路的Sm - DAS的12位 |
| 文件頁數(shù)： | 27/36頁 |
| 文件大?。?/td> | 538K |
| 代理商： | LM12L454CIV |
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5.0 Analog Considerations
5.1 REFERENCE VOLTAGE
The difference in the voltages applied to the V
REF
a
and
V
REF
b
defines the analog input voltage span (the differ-
ence between the voltages applied between two multiplexer
inputs or the voltage applied to one of the multiplexer inputs
and analog ground), over which 4095 positive and 4096
negative codes exist. The voltage sources driving V
REF
a
or
V
REF
b
must have very low output impedance and noise.
The circuit inFigure 12 is an example of a very stable refer-
ence appropriate for use with the LM12L454/8.
The ADC can be used in either ratiometric or absolute refer-
ence applications. In ratiometric systems, the analog input
voltage is proportional to the voltage used for the ADC’s
reference voltage. When this voltage is the system power
supply, the V
REF
a
pin is connected to V
A
a
and V
REF
b
is
connected to GND. This technique relaxes the system refer-
ence stability requirements because the analog input volt-
age and the ADC reference voltage move together. This
maintains the same output code for given input conditions.
For absolute accuracy, where the analog input voltage var-
ies between very specific voltage limits, a time and tempera-
ture stable voltage source can be connected to the refer-
ence inputs. Typically, the reference voltage’s magnitude
will require an initial adjustment to null reference voltage
induced full-scale errors.
5.2 INPUT RANGE
The LM12L454/8’s fully differential ADC and reference volt-
age inputs generate a two’s-complement output that is
found by using the equation below.
V
IN
a
b
V
IN
b
V
REF
a
b
V
REF
b
(4096)
b
(/2
output code
e
(12-bit)
output code
e
V
IN
a
b
V
IN
b
V
REF
a
b
V
REF
b
(256)
b
(/2
(8-bit)
Round up to the next integer value between
b
4096 to 4095
for 12-bit resolution and between
b
256 to 255 for 8-bit res-
olution if the result of the above equation is not a whole
number. As an example, V
REF
a
e
2.5V, V
REF
b
e
1V,
V
IN
a
e
1.5V and V
IN
b
e
GND. The 12-bit
a
sign output
code is positive full-scale, or 0,1111,1111,1111. If V
REF
a
e
3.3V, V
REF
b
e
1V, V
IN
a
e
3V, and V
IN
b
e
GND, the
12-bit
a
sign output code is 0,1100,0000,0000.
5.3 INPUT CURRENT
A charging current flows into or out of (depending on the
input voltage polarity) the analog input pins, IN0–IN7 at the
start of the analog input acquisition time (t
ACQ
). This cur-
rent’s peak value will depend on the actual input voltage
applied.
5.4 INPUT SOURCE RESISTANCE
For low impedance voltage sources (
k
80
X
for 6 MHz oper-
ation) the input charging current will decay, before the end
of the S/H’s acquisition time, to a value that will not intro-
duce any conversion errors. For higher source impedances,
the S/H’s acquisition time can be increased. As an exam-
ple, operating with a 6 MHz clock frequency and maximum
acquisition time, the LM12L454/8’s analog inputs can han-
dle source impedance as high as 5.56 k
X
. Refer to Section
2.1, Instruction RAM ‘‘00’’, Bits 12–15 for further informa-
tion.
5.5 INPUT BYPASS CAPACITANCE
External capacitors (0.01
m
F–0.1
m
F) can be connected be-
tween the analog input pins, IN0–IN7, and analog ground to
filter any noise caused by inductive pickup associated with
long input leads. It will not degrade the conversion accura-
cy.
5.6 NOISE
The leads to each of the analog multiplexer input pins
should be kept as short as possible. This will minimize input
noise and clock frequency coupling that can cause conver-
sion errors. Input filtering can be used to reduce the effects
of the noise sources.
5.7 POWER SUPPLIES
Noise spikes on the V
A
a
and V
D
a
supply lines can cause
conversion errors; the comparator will respond to the noise.
The ADC is especially sensitive to any power supply spikes
that occur during the auto-zero or linearity correction. Low
inductance tantalum capacitors of 10
m
F or greater paral-
leled with 0.1
m
F monolithic ceramic capacitors are recom-
*
Tantalum
**
Ceramic
TL/H/11711–23
FIGURE 12. Low Drift Extremely Stable Reference Circuit
27
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM12L458 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit + Sign Data Acquisition System with Self-Calibration |
| LM12L458_06 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit + Sign Data Acquisition System with Self-Calibration |
| LM12L458CIV | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| LM12L458CIV/NOPB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| LM12L458CIVF | 制造商:Rochester Electronics LLC 功能描述:12-BIT PARALLEL I/O DAS - Bulk |
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