參數(shù)資料
型號: LM1276AAA/NA
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 音頻/視頻放大
英文描述: 1 CHANNEL, VIDEO PREAMPLIFIER, PDIP28
封裝: PLASTIC, DIP-28
文件頁數(shù): 36/50頁
文件大?。?/td> 6075K
代理商: LM1276AAA/NA
Horizontal Flyback or Sync Duration:
HF_S1 (0x8583)
HF_S0 (0x8582)
Reserved
Horizontal Flyback or Sync Duration
RSV
HFL_HS[9:0]
Bits 9–0
This is a 10-bit wide register that records the measured value of the horizontal flyback or sync during video detect. When
no video is detected, this register should return a value of zero. Once measurement is completed and the auto size
enable bit has cleared itself back to 0, the measured data is ready to be read by the microcontroller. Reading this register
before that may give erroneous results. This register resets to default values, ready to record new measured values
when the auto size enable bit is set again.
Horizontal Back Porch Duration:
H_BP1 (0x8585)
H_BP0 (0x8584)
Reserved
Horizontal Back Porch Duration
RSV
HBP[10:0]
Bits 10–0
This is an 11-bit wide register that records the lowest measured value of the horizontal back porch during video detect.
When no video is detected, the sum of this register and the horizontal flyback or sync should be within 1 pixel of the
total number of pixels per line. Once measurement is completed and the auto size enable bit has cleared itself back to
0, the measured data is ready to be read by the microcontroller. Reading this register before that may give erroneous
results. This register resets to default values, ready to record new measured values when the auto size enable bit is set
again.
Vertical Front Porch Duration:
V_FP1 (0x8587)
V_FP0 (0x8586)
Reserved
Vertical Front Porch Duration
RSV
VFP[10:0]
Bits 10–0
This is an 11-bit wide register that records the lowest measured value of the vertical front porch in terms of horizontal
line periods during video detect. When no video is detected, this register should return a value of zero. Once
measurement is completed and the auto size enable bit has cleared itself back to 0, the measured data is ready to be
read by the microcontroller. Reading this register before that may give erroneous results. This register resets to default
values, ready to record new measured values when the auto size enable bit is set again.
Vertical Sync Duration:
V_SYN_D (0x8588)
Vertical Flyback or Sync Duration
VSYNC[7:0]
Bits 7–0
This is an 8-bit wide register that records the measured value of the vertical flyback or sync in terms of horizontal line
periods during video detect. Once measurement is completed and the auto size enable bit has cleared itself back to 0,
the measured data is ready to be read by the microcontroller. Reading this register before that may give erroneous
results. This register resets to default values, ready to record new measured values when the auto size enable bit is set
again.
Vertical Back Porch Duration:
V_BP1 (0x858A)
V_BP0 (0x8589)
Reserved
Vertical Back Porch Duration
RSV
VBP[10:0]
41
www.national.com
200969 Version 2 Revision 4
Print Date/Time: 2011/07/11 11:20:12
LM1276
相關PDF資料
PDF描述
LM1279AN/NOPB 3 CHANNEL, VIDEO AMPLIFIER, PDIP20
LM1279N/NOPB 1 CHANNEL, VIDEO AMPLIFIER, PDIP20
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LM136A-5.0MW8 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 5 V, UUC
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相關代理商/技術參數(shù)
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