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參數(shù)資料
| 型號： | LM1276AAA/NA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 1 CHANNEL, VIDEO PREAMPLIFIER, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁數(shù)： | 26/50頁 |
| 文件大?。?/td> | 6075K |
| 代理商： | LM1276AAA/NA |
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Character Font Access Register:
CHARFONTACC (0x8402)
RESET
Reserved Reserved
VDI
V Sync
H Sync
Select
Plane
SRST
RSV
LIMIT
VSYPOL
HSYPOL
ATTR
FONT4
Bit 0
This is the Color Bit Plane Selector. This bit must be set to 0 to read or write a two-color attribute from the range 0x0000
to 0x2FFF. When reading or writing four-color attributes from the range 0x3000 to 0x3FFF, this bit is set to 0 for the least
significant plane and to 1 for the most significant plane. It is also required to set this bit to read the individual bit planes
of the four color character fonts in 0x3000 to 0x3FFF and 0x7000 to 0x7FFF.
Bit 1
This is the Character/Attribute Selector. This applies to reads from the Display Page RAM (address range 0x8000–
0x81FF). When a 0, the character code is returned and when a 1, the attribute code is returned.
Bit 2
This selects the V input polarity.
If bit = 0, a positive H Sync input signal is required. (Default)
If bit = 1, a negative H Sync input signal is required.
Bit 3
This selects the V sync input polarity.
If bit = 0, a positive V Sync input signal is required. (Default)
If bit = 1, a negative V Sync input signal is required.
Bit 4
This bit limits the period during which video data may be detected.
If the bit is set to 1 then the valid data active period is limited to the vertical blanking time, as set by the vertical blanking
register. If a string of 80 clock pulses is received during this time it is accepted as valid. If a string of 80 pulses is not
received until during the active video time, then this data is ignored. If the bit is set to ‘0’ (default), then the first 80 pulse
clock string that is detected is considered to be valid, even if this is during the active video time.
Bit 5
Reserved. This bit should be set to zero.
Bit 6
Reserved. This bit should be set to zero.
Bit 7
Setting this bit will cause a software reset. All registers (except this one) are loaded with their default values. All
operations currently in progress are aborted (except for I2C transactions). This bit automatically clears itself when the
reset has been completed.
Vertical Blank Duration Register:
VBLANKDUR (0x8403)
Reserve
d
Vertical Blanking Duration
RSV
VB[6:0]
Bits 6–0
This register determines the duration of the vertical blanking signal in scan lines. When vertical blanking is enabled, it
is recommended that this register be set to a number greater than 0x0A.
Bit 7
Reserved. This bit should be set to zero.
OSD Character Height Register:
CHARHTCTRL (0x8404)
CH[7:0]
Bits 7–0
This register determines the OSD character height as described in the section Constant Character Height Mechanism.
The values of this register is equal to the approximate number of OSD height compensated lines required on the screen,
divided by 4. This value is not exact due to the approximation used in scaling the character.
Example: If approximately 384 OSD lines are required on the screen (regardless of the number of scan lines) then the
Character Height Control Register is programmed with 81 (0x51).
www.national.com
32
200969 Version 2 Revision 4
Print Date/Time: 2011/07/11 11:20:12
LM1276
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相關代理商/技術參數(shù) |
參數(shù)描述 |
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| LM1279 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:110 MHz RGB Video Amplifier System with OSD |
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| LM1279AN | 功能描述:IC AMP RGB VIDEO SYSTEM 20-DIP RoHS:否 類別:集成電路 (IC) >> 線性 - 放大器 - 視頻放大器和頻緩沖器 系列:- 標準包裝:1,000 系列:- 應用:驅(qū)動器 輸出類型:差分 電路數(shù):3 -3db帶寬:350MHz 轉(zhuǎn)換速率:1000 V/µs 電流 - 電源:14.5mA 電流 - 輸出 / 通道:60mA 電壓 - 電源，單路/雙路(±):5 V ~ 12 V，±2.5 V ~ 6 V 安裝類型:表面貼裝 封裝/外殼:20-VFQFN 裸露焊盤 供應商設備封裝:20-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) |
| LM1279DL WAF | 制造商:Texas Instruments 功能描述: |
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