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參數(shù)資料
| 型號： | LM1229YA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 運(yùn)動控制電子 |
| 英文描述： | I2C Compatible CMOS TV RGB and Deflection Processor |
| 中文描述： | WAVEFORM GENERATION, PQFP64 |
| 封裝： | PLASTIC, QFP-64 |
| 文件頁數(shù)： | 18/27頁 |
| 文件大?。?/td> | 969K |
| 代理商： | LM1229YA |
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Tables
These are the tables which are referenced in the text.
TABLE 1. Scan Frequencies
FREQ1
(JP1)
float
0
0
0
1
1
1
FREQ2
(JP2)
x
0
float
1
0
float
1
FREE RUN
(kHz)
15.7
28.1
31.4
33.8
37.9
45.1
48.0
TV MODE
(kHz)
15.734
28.1
31.468
33.750, 33.716
37.9
45.000
48.077 (SVGA)
TABLE 2. OSD Modes
TRANS
0
0
ENABLE
0
1
ANALOG OSD (DA = 1)
DIGITAL OSD (DA = 0)
Normal video display.
Foreground and background determined by OSD
inputs.
Normal video display.
Foreground and background determined by OSD
inputs. OSD TRANS register is ignored.
Normal video display.
Foreground and background determined by OSD
inputs.
Normal video display.
OSD window background is video, with contrast
from OSD TRANS register, 0x0A[6:0].
1
1
0
1
TABLE 3. OSD Peak to Peak Amplitudes
RGB IN
OSD
ENABLE
OSD
INPUT
0.7V analog
(DA = 1)
or
digital
@
logic 1
(DA = 0)
digital
@
logic 0
0.7V analog
any
OSD[1:0]
AUX
DA
OSD/AUX
PERCENT
55
OSD
OUTPUT
1.60V
VIDEO
OUTPUT
2.90V
0.70V
logic 1
0 0
X
1,0
0 1
X
1,0
65
1.89V
2.90V
1 0
X
1,0
75
2.18V
2.90V
1 1
X
1,0
85
2.47V
2.90V
X X
X X
X X
X
1
X
0
1
X
0
0V
2.90V
2.90V
2.90V
100
0
2.90V
0V
logic 0
TABLE 4. HEHT Compensation
Input
Φ
Conditions
HEHT register = 0011b
Changing from
3.5V to 1.5V
(R
EHT
= 20k)
Φ
= 4.43% left
3.81% left
3.17% left
2.56% left
Φ
= 0
Φ
= 4.45% right
3.81% right
3.17% right
2.56% right
0010b
0001b
0000b
HEHT register = 1xxxb
HEHT register = 0111b
0110b
0101b
0100b
L
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