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參數(shù)資料
| 型號： | LHF64P01 |
| 廠商： | Sharp Corporation |
| 英文描述： | 64Mbit (4Mbitx16/8Mbitx8) Page Flash Memory |
| 中文描述： | 64兆比特（4Mbitx16/8Mbitx8）頁閃存 |
| 文件頁數(shù)： | 17/45頁 |
| 文件大?。?/td> | 1041K |
| 代理商： | LHF64P01 |
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LHF64P01 15
Rev. 0.06
NOTE:
1. When the device is configured in one of the pulse modes, the STS pin pulses low with a typical pulse width of 250ns.
Table 9. STS Configuration Definition
(1)
R
15
R
7
R
14
R
6
R
13
R
5
R
12
R
4
R
11
R
3
R
10
R
2
R
9
CC
1
R
8
CC
0
DQ
15
-DQ
2
= RESERVED FOR FUTURE
ENHANCEMENTS (R)
DQ
1
-DQ
0
= STS CONFIGURATION CODE (CC)
00 = level mode: RY/BY# indication. (Default)
01 = pulse mode on erase complete.
10 = pulse mode on program complete.
11 = pulse mode on erase or program complete.
In STS configuration = "00", STS is V
OL
when the WSM is
executing internal erase or program algorithms.
STS configuration codes "01", "10" and "11" are all pulse
modes such that the STS pin pulses low then high when the
operation indicated by the configuration code is completed.
NOTES:
After power-up or device reset, STS configuration is set to
"00".
STS configuration 00
The output of the STS pin is the control signal to prevent
accessing a flash memory while the internal WSM is busy
(SR.7="0").
STS configuration 01
The output of the STS pin is the control signal to indicate
that the erase operation is completed and the flash memory
is available for the next operation.
STS configuration 10
The output of the STS pin is the control signal to indicate
that the program operation is completed and the flash
memory is available for the next operation.
STS configuration 11
The output of the STS pin is the control signal to indicate
that the erase or program operation is completed and the
flash memory is available for the next operation.
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