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參數(shù)資料
| 型號： | L9942 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Super Smart Motor Bridge Driver(電機橋驅(qū)動器) |
| 中文描述： | 超級智能電機橋式驅(qū)動器（電機橋驅(qū)動器） |
| 文件頁數(shù)： | 18/21頁 |
| 文件大?。?/td> | 160K |
| 代理商： | L9942 |
Table 2. Programspace.
RESERVED *)
USER PROGRAM ROM
(3872 BYTES)
RESERVED *)
INTERRUPT VECTOR #4
INTERRUPT VECTOR #3
INTERRUPT VECTOR #2
INTERRUPT VECTOR #1
RESERVED *)
INTERRUPT VECTOR #0
0000h
÷
007Fh
0080h
÷
0F9Fh
0FA0h
÷
0FEFh
0FF0h,0FF1h
0FF2h,0FF3h
0FF4h,0FF5h
0FF6h,0FF7h
0FF8h,0FFBh
0FFCh,0FFDh
*) Thisarea is reservedfor test purposeand is not availablefor the user.
INTERRUPTS STRUCTURE
InterruptOption Register IOR
Bit 6 of registerC8h is used to select negativeedge (B6 = 0) or low level(B6 = 1) I1 interrupt sensitivity.
Bit 5 of registerC8h is used to select negativeedge (B5 = 0) or positive edge (B5 = 1) I2 interrupt
sensitivity.
Bit 4 of registerC8h is used to disable(B4=0) all maskable interrupts.
Register C8h is cleared duringreset.
Thereare no read and single bit instructions possible.
See alsointerrupt circuit diagram (Fig. 11).
Testmode pin TEST has to be low for normal operation.
Interrupts
Non maskableinterrupt input IO is connectedto the power bridge flags (start address FFCH).
I1 is connectedto PORTA
I2 is connectedto Bus Interfaceand CAN Controller
I3 is connectedto Contact Monitor
I4 is connectedto TIMER1
(startaddressFF6H).
(start address FF4H).
(start addressFF2H).
(startaddressFF0H).
The interrupt characteristicsof I/O port A can be programmedin four different modes.
Interrupt polarity is selected by bit PAES of register BPCR, interrupt sensitivity is controlled by bit 6 of
registerIOR (see following table 3).
Table 3. I/O portinterrupt selection.
PAES
0
0
1
1
IOR6
0
1
0
1
Port A interrupt
falling edge
low level
rising edge
high level
MICROCONTROLLER SECTION
(continued)
L9942
18/21
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