參數(shù)資料
型號(hào): L80223
英文描述: L80223 10BASE-T/100BASE- TX/FX Ethernet PHY technical manual
中文描述: L80223 10BASE-T/100BASE-德克薩斯州/ FX以太網(wǎng)物理層技術(shù)手冊(cè)
文件頁(yè)數(shù): 36/192頁(yè)
文件大小: 1306K
代理商: L80223
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)當(dāng)前第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)
Draft 6/5/00
2-16
Functional Description
Copyright 2000 by LSI Logic Corporation. All rights reserved.
2.2.3.3 Encoder Bypass
Setting the Bypass Encoder/Decoder bit (BYP_ENC) in the MI serial port
Configuration 1 register bypasses the 4B5B encoder. When this bit is set,
5B code words are passed directly from the controller interface to the
scrambler without any of the alterations described in
Section 2.2.3.1,
“4B5B Encoder (100 Mbits/s),” page 2-14
. Setting the bit automatically
places the device in the FBI mode as described in the
subsection entitled
“FBI Selection”
on
page 2-13
.
2.2.4 Decoder
This section describes the 4B5B decoder, used in 100 Mbits/s operation,
which converts 5B encoded data to 4B nibbles. It also describes the
Manchester Decoder, used in 10BASE-T operation.
2.2.4.1 4B5B Decoder (100 Mbits/s)
Because the TP input data is 4B5B encoded on the transmit side, the
4B5B decoder must decode it on the receive side. The mapping of the
5B codewords to the 4B nibbles is specified in IEEE 802.3. The 4B5B
decoder takes the 5B codewords from the descrambler, converts them
into 4B nibbles according to
Table 2.4
, and sends the 4B nibbles to the
receive Ethernet controller.
The 4B5B decoder also strips off the SSD delimiter (/J/K/ symbols), and
replaces it with two 4B Data 5 nibbles (/5/ symbol). It also strips off the
ESD delimiter (/T/R/ symbols), and replaces it with two 4B Data 0 nibbles
(/I/ symbol), per IEEE 802.3 specifications (see
Figure 2.2
).
The 4B5B decoder detects SSD, ESD, and codeword errors in the
incoming data stream as specified in IEEE 802.3. To indicate these
errors, the device asserts the RX_ER output as well as the SSD, ESD,
and CWRD bits in the MI serial port Status Output register while the
errors are being transmitted across RXD[3:0].
2.2.4.2 Manchester Decoder (10 Mbits/s)
In Manchester coded data, the first half of the data bit contains the
complement of the data, and the second half of the data bit contains the
true data. The Manchester Decoder converts the single data stream from
the TP receiver into non-return to zero (NRZ) data for the controller
相關(guān)PDF資料
PDF描述
L80225 L80225 10/100 MbpsTX/10BT Ethernet Physical Layer Device (PHY) technical manual 4/02
L80223 10BASE-T/100BASE-TX/FX Ethernet Physical Layer Device (PHY)(10BASE-T/100BASE-TX/FX 以太網(wǎng)物理層處理器)
L80600 L80600 10/100/1000 Mbits/s Ethernet PHY technical manual 3/01
L811-1X1T-03 1port.None LEDs.low profile RJ45 10/100Base-TX
L82-510 Logic IC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
L80223/A 制造商:LSI Corporation 功能描述:PN may be NE DW
L80223/C 制造商:LSI Corporation 功能描述:PN may be NE DW
L80223/D 制造商:LSI Corporation 功能描述:PHY 1-CH 10Mbps/100Mbps 64-Pin LQFP
L80223/D-E6 制造商:LSI Corporation 功能描述:TRANSITION TO P/N 68032B1 - Bulk
L80223/D-LEADFREE 制造商:LSI Corporation 功能描述: