參數(shù)資料
型號: KSZ8893FQL
廠商: Micrel Inc
文件頁數(shù): 112/117頁
文件大?。?/td> 0K
描述: IC SWITCH FAST ETH 3PORT 128PQFP
標(biāo)準(zhǔn)包裝: 66
控制器類型: 以太網(wǎng)開關(guān)控制器
接口: MII,RMII,SNI
電源電壓: 3.1 V ~ 3.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應(yīng)商設(shè)備封裝: 128-PQFP(14x20)
包裝: 托盤
配用: 576-1603-ND - EVAL KIT EXPERIMENTAL KSZ8893MQL
其它名稱: 576-1565
Micrel, Inc.
KSZ8893FQL
October 2007
94
M9999-101607-1.3
Indirect Access Registers
Registers 121 to 131 provide read and write access to the static MAC address table, VLAN table, dynamic MAC
address table, and MIB counters.
Register 121 (0x79): Indirect Access Control 0
Bit
Name
R/W
Description
Default
7-5
Reserved
R/W
Reserved
Do not change the default values.
000
4
Read High / Write Low
R/W
1 = Read cycle
0 = Write cycle
0
3-2
Table Select
R/W
00 = Static MAC address table selected
01 = VLAN table selected
10 = Dynamic MAC address table selected
11 = MIB counter selected
00
1-0
Indirect Address High
R/W
Bits [9:8] of indirect address
00
Register 122 (0x7A): Indirect Access Control 1
Bit
Name
R/W
Description
Default
7-0
Indirect Address Low
R/W
Bits [7:0] of indirect address
0000_0000
Note: A write to register 122 triggers the read/write command. Read or write access is determined by register 121 bit 4.
Register 123 (0x7B): Indirect Data Register 8
Bit
Name
R/W
Description
Default
7
CPU Read Status
RO
This bit is applicable only for dynamic MAC address table and
MIB counter reads.
1 = read is still in progress
0 = read has completed
0
6-3
Reserved
RO
Reserved
0000
2-0
Indirect Data [66:64]
RO
Bits [66:64] of indirect data
000
Register 124 (0x7C): Indirect Data Register 7
Bit
Name
R/W
Description
Default
7-0
Indirect Data [63:56]
R/W
Bits [63:56] of indirect data
0000_0000
Register 125 (0x7D): Indirect Data Register 6
Bit
Name
R/W
Description
Default
7-0
Indirect Data [55:48]
R/W
Bits [55:48] of indirect data
0000_0000
Register 126 (0x7E): Indirect Data Register 5
Bit
Name
R/W
Description
Default
7-0
Indirect Data [47:40]
R/W
Bits [47:40] of indirect data
0000_0000
Register 127 (0x7F): Indirect Data Register 4
Bit
Name
R/W
Description
Default
7-0
Indirect Data [39:32]
R/W
Bits [39:32] of indirect data
0000_0000
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