參數(shù)資料
型號(hào): KSZ8864RMN-EVAL
廠商: Micrel Inc
文件頁(yè)數(shù): 42/111頁(yè)
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR KSZ8864RMN
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,以太網(wǎng)控制器(PHY 和 MAC)
嵌入式:
已用 IC / 零件: KSZ8864RMN
已供物品:
相關(guān)產(chǎn)品: 576-3787-ND - IC ETHERNET SW 4PORT 64QFN
其它名稱: 576-3869
PIC16C9XX
DS30444E - page 36
1997 Microchip Technology Inc.
5.4
PORTD and TRISD Registers
PORTD is an 8-bit port with Schmitt Trigger input buff-
ers. The rst ve pins are congurable as general pur-
pose I/O pins or LCD segment drivers. Pins RD5, RD6
and RD7 can be digital inputs or LCD segment or com-
mon drivers.
TRISD controls the direction of pins RD0 through RD4
when PORTD is congured as a digital port.
EXAMPLE 5-4:
INITIALIZING PORTD
BCF
STATUS,RP0
;Select Bank2
BSF
STATUS,RP1
;
BCF
LCDSE,SE29
;Make RD<7:5> digital
BCF
LCDSE,SE0
;Make RD<4:0> digital
BSF
STATUS,RP0
;Select Bank1
BCF
STATUS,RP1
;
MOVLW 0x07
;Make RD<4:0> outputs
MOVWF TRISD
;Make RD<7:5> inputs
Note:
On a Power-on Reset these pins are con-
gured as LCD segment drivers.
Note:
To congure the pins as a digital port, the
corresponding bits in the LCDSE register
must be cleared. Any bit set in the LCDSE
register overrides any bit settings in the
corresponding TRIS register.
FIGURE 5-6:
PORTD<4:0> BLOCK
DIAGRAM
Data Bus
WR
RD
Data Latch
TRIS Latch
Schmitt
Trigger
input
buffer
Q
D
CK
Q
D
CK
EN
Q
D
EN
I/O pin
RD TRIS
LCDSE<n>
LCD
LCD Segment
Segment Data
Output Enable
PORT
TRIS
PORT
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