參數(shù)資料
型號: KS8993MI
廠商: Micrel Inc
文件頁數(shù): 25/85頁
文件大?。?/td> 0K
描述: IC SWITCH 10/100 3PORT 128PQFP
標準包裝: 66
系列: *
類型: *
應用: *
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應商設備封裝: 128-PQFP(14x20)
包裝: 散裝
配用: 576-1013-ND - BOARD EVAL EXPERIMENT KS8993M
其它名稱: 576-1014
Micrel, Inc.
KS8993M/ML/MI
April 2005
31
M9999-041205
The MII interface operates in either PHY mode or MAC mode. The interface is a nibble wide data interfaces and
therefore run at the network bit rate (not encoded). Additional signals on the transmit side indicate when data is
valid or when an error occurs during transmission. Likewise, the receive side has indicators that convey when the
data is valid and without physical layer errors. For half duplex operation there is a signal that indicates a collision
has occurred during transmission.
Note that the signal MRXER is not provided on the interface for PHY mode operation and the signal MTXER is
not provided on the interface for MAC mode operation. Normally MRXER would indicate a receive error coming
from the physical layer device. MTXER would indicate a transmit error from the MAC device. These signals are
not appropriate for this configuration. For PHY mode operation, if the device interfacing with the KS8993M has an
MRXER pin, it should be tied low. For MAC mode operation, if the device interfacing with the KS8993M has an
MTXER pin, it should be tied low.
SNI (7-Wire) Operation
The serial network interface (SNI) or 7-wire is compatible with some controllers used for network layer protocol
processing. In SNI mode, the KS8993M acts like a PHY and the external controller functions as the MAC. The
KS8993M can interface directly with external controllers using the 7-wire interface. These signals are divided into
two groups, one for transmission and the other for reception. The signals involved are described in the following
table.
Pin Descriptions
External MAC
Controller Signals
KS8993M
PHY Signals
Transmit enable
TXEN
SMTXEN
Serial transmit data
TXD
SMTXD[0]
Transmit clock
TXC
SMTXC
Collision detection
COL
SCOL
Carrier sense
CRS
SMRXDV
Serial receive data
RXD
SMRXD[0]
Receive clock
RXC
SMRXC
Table 4. SNI Signals
The SNI interface is a bit wide data interface and therefore runs at the network bit rate (not encoded). An
additional signal on the transmit side indicates when data is valid. Similarly, the receive side has an indicator that
conveys when the data is valid.
For half duplex operation, the KS8993M’s SCOL signal is used to indicate that a collision has occurred during
transmission.
MII Management Interface (MIIM)
The KS8993M supports the IEEE 802.3 MII Management Interface, also known as the Management Data
Input/Output (MDIO) Interface. This interface allows upper-layer devices to monitor and control the states of the
KS8993M. An external device with MDC/MDIO capability can be used to read the PHY status or configure the
PHY settings. Further details on the MIIM interface can be found in section 22.2.4.5 of the IEEE 802.3
specification.
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