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參數(shù)資料
| 型號： | JZ48F4L0QTZ |
| 廠商： | Intel Corp. |
| 英文描述： | StrataFlash Wireless Memory |
| 中文描述： | 無線的StrataFlash存儲器 |
| 文件頁數(shù)： | 63/106頁 |
| 文件大小： | 1272K |
| 代理商： | JZ48F4L0QTZ |
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Intel StrataFlash Wireless Memory (L18)
Datasheet
Intel StrataFlash Wireless Memory (L18)
Order Number: 251902, Revision: 009
April 2005
63
During a program suspend, deasserting CE# places the device in standby, reducing active current.
V
PP
must remain at its programming level, and WP# must remain unchanged while in program
suspend. If RST# is asserted, the device is reset.
11.5
Program Resume
The Resume command instructs the device to continue programming, and automatically clears
Status Register bits SR[7,2]. This command can be written to any partition. When read at the
partition that’s programming, the device outputs data corresponding to the partition’s last state. If
error bits are set, the Status Register should be cleared before issuing the next instruction. RST#
must remain deasserted (see
Figure 40, “Program Suspend/Resume Flowchart” on page 86
).
11.6
Program Protection
When V
PP
= V
IL
, absolute hardware write protection is provided for all device blocks. If V
PP
is
below V
PPLK
, programming operations halt and SR[3] is set indicating a V
PP
-level error. Block
lock registers are not affected by the voltage level on V
PP
; they may still be programmed and read,
even if V
PP
is less than V
PPLK
.
Figure 27.
Example VPP Supply Connections
Factory Programming with
V
= V
Complete write/Erase Protection when
V
PP
≤
V
PPLK
VCC
VPP
VCC
VPP
Low Voltage and Factory Programming
Low-voltage Programming only
Logic Control of Device Protection
VCC
VPP
Low Voltage Programming Only
Full Device Protection Unavailable
VCC
VPP
≤
10K
V
PP
V
CC
V
CC
PROT #
V
CC
V
PP
=V
PPH
V
CC
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