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參數(shù)資料
| 型號： | ISPPAC-CLK5620V-01T100I |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer |
| 中文描述： | 5600 SERIES, PLL BASED CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 26/47頁 |
| 文件大?。?/td> | 871K |
| 代理商： | ISPPAC-CLK5620V-01T100I |
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Lattice Semiconductor
ispClock5600 Family Data Sheet
26
Figure 23. Maximum Ambient Temperature vs. Number of Active Output Banks
Figure 23b shows another derating curve, derived under the assumption that the output frequency is 100MHz. For
many applications, 100MHz outputs will be a more realistic scenario. Comparing the maximum temperature limits
of Figure 23b with Figure 23a, one can see that signi
fi
cantly higher operating temperatures are possible in LVC-
MOS 3.3V output mode with more outputs at 100MHz than at 320MHz.
The examples above used LVCMOS 3.3V logic, which represents the maximum power dissipation case at higher
frequencies. For optimal operation at very high frequencies (> 150 MHz) LVDS will often be the best choice from a
signal integrity standpoint. For LVDS-con
fi
gured outputs, the maximum ICCO current consumption per bank is low
enough that both the ispClock5610 and ispClock5620 can operate all outputs at maximum frequency over their
complete rated temperature range, as shown in Figure 23c.
Note that because of variations in circuit board mounting, construction, and layout, as well as convective and forced
air
fl
ow present in a given design, actual die operating temperature is subject to considerable variation from that
which may be theoretically predicted from package characteristics and device power dissipation.
Output Enable Controls
The ispClock5600 family provides the user with several options for enabling and disabling output pins, as well as
suspending the output clock. In addition to providing the user with the ability to reduce the device’s power con-
Temperature Derating Curves
(Outputs LVCMOS 3.3V, f
OUT
=320 MHz)
Temperature Derating Curves
(Outputs LVCMOS 3.3V, f
OUT
=100 MHz)
40
50
60
70
80
90
0
2
4
6
8
10
# Active Output Banks
# Active Output Banks
M
°
C
M
°
C
5620 Commercial
5620 Industrial
5610 Commericial
5610 Industrial
40
50
60
70
80
90
0
2
4
6
8
10
(a)
(b)
Temperature Derating Curves
(Outputs LVDS, f
OUT
=320 MHz)
40
50
60
70
80
90
M
°
C
0
2
4
6
8
10
# Active Output Banks
(c)
相關PDF資料 |
PDF描述 |
|---|---|
| ISPPAC-CLK5610V-01T48C | Spot Light; LED Color:Blue; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Supply Current:160mA; Supply Voltage:30VDC; Wavelength:470nm |
| ISPPAC-CLK5620V-01T48C | LED Area Light; LED Color:Green; Leaded Process Compatible:No; Light Emitting Area:62x62mm; Peak Reflow Compatible (260 C):No; Supply Current:200mA; Supply Voltage:24VDC; Wavelength:525nm |
| ISPPAC-CLK5610V-01T48I | LED Area Light; LED Color:Green; Leaded Process Compatible:No; Light Emitting Area:80x80mm; Peak Reflow Compatible (260 C):No; Supply Current:250mA; Supply Voltage:24VDC; Wavelength:525nm |
| ISPPAC-CLK5620V-01T48I | Linear Array Light; LED Color:Green; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Supply Current:800mA; Supply Voltage:24VDC; Wavelength:530nm |
| ISPPAC-CLK5610V-01TN100C | LED On-Axis Light; LED Color:Green; Leaded Process Compatible:No; Light Emitting Area:100x100mm; Peak Reflow Compatible (260 C):No; Supply Current:500mA; Supply Voltage:24VDC; Wavelength:520nm |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISPPAC-CLK5620V-01T48C | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer |
| ISPPAC-CLK5620V-01T48I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer |
| ISPPAC-CLK5620V-01TN100C | 功能描述:時鐘驅(qū)動器及分配 PROGRAMMABLE ZERO DELAY CL GEN RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| ISPPAC-CLK5620V-01TN100I | 功能描述:時鐘驅(qū)動器及分配 PROGRAMMABLE ZERO DELAY CL GEN RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| ISPPAC-CLK5620V-01TN48C | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer |
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