參數(shù)資料
型號(hào)： ISPPAC-CLK5620V-01T100I
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： 時(shí)鐘及定時(shí)
英文描述： In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer
中文描述： 5600 SERIES, PLL BASED CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP100
封裝： TQFP-100
文件頁(yè)數(shù)： 2/47頁(yè)
文件大?。?/td> 871K
代理商： ISPPAC-CLK5620V-01T100I
Lattice Semiconductor
ispClock5600 Family Data Sheet
2
General Description and Overview
The ispClock5610 and ispClock5620 are in-system-programmable high-fanout PLL-based clock drivers designed
for use in high performance communications and computing applications. The ispClock5610 provides up to 10 sin-
gle-ended or
fi
ve differential clock outputs, while the ispClock5620 provides up to 20 single-ended or 10 differential
clock outputs. Each pair of outputs may be independently con
fi
gured to support separate I/O standards (LVDS,
LVPECL, LVTTL, LVCMOS, SSTL, HSTL) and output frequency. In addition, each output provides independent pro-
grammable control of termination, slew-rate, and timing skew. All con
fi
guration information is stored on-chip in non-
volatile E
CMOS memory.
2
The ispClock5600’s PLL and divider systems supports the synthesis of clock frequencies differing from that of the
reference input through the provision of programmable input and feedback dividers. A set of
fi
ve post-PLL V-divid-
ers provides additional
fl
exibility by supporting the generation of
fi
ve separate output frequencies. Loop feedback
may be taken internally from the output of any of the
fi
ve V-dividers, or externally through FBKA+/- or FBKB+/- pins.
The core functions of all members of the ispClock5600 family are identical, the differences between devices being
restricted to the number of inputs and outputs, as shown in the following table. Figures 1 and 2 show functional
block diagrams of the ispClock5610 and ispClock5620.
Table 1. ispClock5600 Family Members
Figure 1. ispClock5610 Functional Block Diagram
Device
Ref. Input Pairs
Feedback Input Pairs
Clock Outputs
ispClock5610
1
1
10
ispClock5620
2
2
20
VCO
LOOP
FILTER
PHASE
DETECT
LOCK
DETECT
M
N
INPUT
DIVIDER
FEEDBACK
SKEW ADJUST
1
0
FEEDBACK
DIVIDER
GOE
OEX
LOCK
PLL_BYPASS
JTAG INTERFACE
OEY
TDI
TMS
TCK
TDO
SGATE
SKEW
CONTROL
OUTPUT
DRIVERS
BANK_5A
BANK_5B
BANK_7A
BANK_7B
OUTPUT
DIVIDERS
OUTPUT ROUTING
MATRIX
RESET
V1
V0
V3
V4
BANK_0A
BANK_0B
BANK_2A
BANK_2B
BANK_4A
BANK_4B
PS0
PS1
Profile Select
Control
0
1
2
3
OUTPUT ENABLE CONTROLS
(1-32)
(1-32)
(2-64)
(2-64)
(2-64)
(2-64)
(2-64)
REFA+
REFA-
REFVTT
FBKA+
FBKA -
FBKVTT
E
2
Configuration
相關(guān)PDF資料
PDF描述
ISPPAC-CLK5610V-01T48C Spot Light; LED Color:Blue; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Supply Current:160mA; Supply Voltage:30VDC; Wavelength:470nm
ISPPAC-CLK5620V-01T48C LED Area Light; LED Color:Green; Leaded Process Compatible:No; Light Emitting Area:62x62mm; Peak Reflow Compatible (260 C):No; Supply Current:200mA; Supply Voltage:24VDC; Wavelength:525nm
ISPPAC-CLK5610V-01T48I LED Area Light; LED Color:Green; Leaded Process Compatible:No; Light Emitting Area:80x80mm; Peak Reflow Compatible (260 C):No; Supply Current:250mA; Supply Voltage:24VDC; Wavelength:525nm
ISPPAC-CLK5620V-01T48I Linear Array Light; LED Color:Green; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Supply Current:800mA; Supply Voltage:24VDC; Wavelength:530nm
ISPPAC-CLK5610V-01TN100C LED On-Axis Light; LED Color:Green; Leaded Process Compatible:No; Light Emitting Area:100x100mm; Peak Reflow Compatible (260 C):No; Supply Current:500mA; Supply Voltage:24VDC; Wavelength:520nm
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISPPAC-CLK5620V-01T48C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer
ISPPAC-CLK5620V-01T48I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer
ISPPAC-CLK5620V-01TN100C 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 PROGRAMMABLE ZERO DELAY CL GEN RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
ISPPAC-CLK5620V-01TN100I 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 PROGRAMMABLE ZERO DELAY CL GEN RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
ISPPAC-CLK5620V-01TN48C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer
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