參數(shù)資料
型號： ISPPAC-CLK55xx
廠商： Lattice Semiconductor Corporation
英文描述： In-System Programmable Clock Generator with Universal Fan-Out Buffer
中文描述： 在系統(tǒng)可編程時(shí)鐘發(fā)生器與通用扇出緩沖器
文件頁數(shù)： 36/43頁
文件大?。?/td> 867K
代理商： ISPPAC-CLK55XX
Lattice Semiconductor
ispClock5500 Family Data Sheet
36
Pin Descriptions
Pin Name
Description
Pin Type
Pin Number
ispClock5510
48 TQFP
ispClock5520
100 TQFP
VCCO_0
Output Driver ‘0’ VCC
Power
1
3
VCCO_1
Output Driver ‘1’ VCC
Power
5
7
VCCO_2
Output Driver ‘2’ VCC
Power
9
11
VCCO_3
Output Driver ‘3’ VCC
Power
25
15
VCCO_4
Output Driver ‘4’ VCC
Power
29
19
VCCO_5
Output Driver ‘5’ VCC
Power
—
51
VCCO_6
Output Driver ‘6’ VCC
Power
—
55
VCCO_7
Output Driver ‘7’ VCC
Power
—
59
VCCO_8
Output Driver ‘8’ VCC
Power
—
63
VCCO_9
Output Driver ‘9’ VCC
Power
—
67
GNDO_0
Output Driver ‘0’ Ground
GND
4
6
GNDO_1
Output Driver ‘1’ Ground
GND
8
10
GNDO_2
Output Driver ‘2’ Ground
GND
12
14
GNDO_3
Output Driver ‘3’ Ground
GND
28
18
GNDO_4
Output Driver ‘4’ Ground
GND
32
22
GNDO_5
Output Driver ‘5’ Ground
GND
—
54
GNDO_6
Output Driver ‘6’ Ground
GND
—
58
GNDO_7
Output Driver ‘7’ Ground
GND
—
62
GNDO_8
Output Driver ‘8’ Ground
GND
—
66
GNDO_9
Output Driver ‘9’ Ground
GND
—
70
BANK_0A
Clock Output driver 0, ‘A’ output
Output
3
5
BANK_0B
Clock Output driver 0, ‘B’ output
Output
2
4
BANK_1A
Clock Output driver 1, ‘A’ output
Output
7
9
BANK_1B
Clock Output driver 1, ‘B’ output
Output
6
8
BANK_2A
Clock Output driver 2, ‘A’ output
Output
11
13
BANK_2B
Clock Output driver 2, ‘B’ output
Output
10
12
BANK_3A
Clock Output driver 3, ‘A’ output
Output
27
17
BANK_3B
Clock Output driver 3, ‘B’ output
Output
26
16
BANK_4A
Clock Output driver 4, ‘A’ output
Output
31
21
BANK_4B
Clock Output driver 4, ‘B’ output
Output
30
20
BANK_5A
Clock Output driver 5, ‘A’ output
Output
—
53
BANK_5B
Clock Output driver 5, ‘B’ output
Output
—
52
BANK_6A
Clock Output driver 6, ‘A’ output
Output
—
57
BANK_6B
Clock Output driver 6, ‘B’ output
Output
—
56
BANK_7A
Clock Output driver 7, ‘A’ output
Output
—
61
BANK_7B
Clock Output driver 7, ‘B’ output
Output
—
60
BANK_8A
Clock Output driver 8, ‘A’ output
Output
—
65
BANK_8B
Clock Output driver 8, ‘B’ output
Output
—
64
BANK_9A
Clock Output driver 9, ‘A’ output
Output
—
69
BANK_9B
Clock Output driver 9, ‘B’ output
Output
—
68
VCCA
Analog VCC for PLL circuitry
Power
13
30
GNDA
Analog Ground for PLL circuitry
GND
14
31
相關(guān)PDF資料
PDF描述
ISPPAC-CLK5510V In-System Programmable Clock Generator with Universal Fan-Out Buffer
ISPPAC-CLK5510V-01T48C In-System Programmable Clock Generator with Universal Fan-Out Buffer
ISPPAC-CLK5510V-01T48I In-System Programmable Clock Generator with Universal Fan-Out Buffer
ISPPAC-CLK5520V-01T100C LED Area Light; LED Color:Blue; Leaded Process Compatible:No; Light Emitting Area:62x62mm; Peak Reflow Compatible (260 C):No; Supply Current:200mA; Supply Voltage:24VDC; Wavelength:470nm
ISPPAC-CLK5520V-01T100I Linear Array Light; LED Color:Blue; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Supply Current:800mA; Supply Voltage:24VDC; Wavelength:470nm
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISPPACCLK5610AV-01T100C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer
ISPPACCLK5610AV-01T100I 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer
ispPAC-CLK5610AV-01T48C 功能描述:時(shí)鐘驅(qū)動器及分配 ISP 0 Delay Clock Ge n w/Unv Fan-Out Buf RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
ISPPACCLK5610AV-01T48C 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer
ispPAC-CLK5610AV-01T48I 功能描述:時(shí)鐘驅(qū)動器及分配 ISP 0 Dlay Clck Gen w/Unv Fan-Out Buf I RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel
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