參數(shù)資料
型號(hào)： ISPLSI1024EA-200LT100
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： PLD
英文描述： In-System Programmable High Density PLD
中文描述： EE PLD, 6 ns, PQFP100
封裝： TQFP-100
文件頁(yè)數(shù)： 4/13頁(yè)
文件大?。?/td> 162K
代理商： ISPLSI1024EA-200LT100
4
Specifications
ispLSI 1024EA
Absolute Maximum Ratings
1
Supply Voltage V
cc
.................................. -0.5 to +7.0V
Input Voltage Applied........................ -2.5 to V
CC
+1.0V
Off-State Output Voltage Applied ..... -2.5 to V
CC
+1.0V
Storage Temperature................................ -65 to 150
°
C
Case Temp. with Power Applied .............. -55 to 125
°
C
Max. Junction Temp. (T
J
) with Power Applied ... 150
°
C
1. Stresses above those listed under the
“
Absolute Maximum Ratings
”
may cause permanent damage to the device. Functional
operation of the device at these or at any other conditions above those indicated in the operational sections of this specification
is not implied (while programming, follow the programming specifications).
DC Recommended Operating Conditions
T
A
= 0
°
C to + 70
°
C
SYMBOL
Table 2-0005/1024EA
V
CC
V
CCIO
V
IH
V
IL
PARAMETER
Supply Voltage
Supply Voltage: Output Drivers
Input High Voltage
Input Low Voltage
MIN.
MAX.
UNITS
4.75
4.75
3.0
0
2.0
5.25
5.25
3.6
0.8
V
cc
+1
V
V
V
V
V
Commercial
5V
3.3V
Capacitance (T
A
=25
o
C, f=1.0 MHz)
Erase/Reprogram Specifications
Table 2-0008/1024EA
PARAMETER
Erase/Reprogram Cycles
MINIMUM
10000
MAXIMUM
—
UNITS
Cycles
C
SYMBOL
Table 2-0006/1024EA
C
PARAMETER
Y0 Clock Capacitance
10
UNITS
pf
TYPICAL
8
TEST CONDITIONS
V = 5.0V, V = 2.0V
1
2
Dedicated Input, I/O, Y1, Y2, Y3, Clock Capacitance
(Commercial/Industrial)
pf
V = 5.0V, V = 2.0V
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